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git01.mediatek.com / filogic / atf / 5dd10ad908c23af65c4d6c41f0f00877d06488dd / plat / xilinx / zynqmp / tsp
  1. 8ccc4a4 cdns: Use generic console_t data structure by Andre Przywara · Sat Jan 25 00:58:35 2020 +0000
  2. 53f193f zynqmp: add support for multi console interface by Ambroise Vincent · Wed May 29 11:46:08 2019 +0100
  3. de97ff3 Remove duplicated definitions of linker symbols by Antonio Nino Diaz · Fri Jan 25 13:28:38 2019 +0000
  4. bd7b740 plat/arm: Sanitise includes by Antonio Nino Diaz · Fri Jan 25 14:30:04 2019 +0000
  5. 0bfd700 plat: xilinx: zynqmp: Move zynqmp_private.h to include directory by Jolly Shah · Tue Jan 08 11:10:47 2019 -0800
  6. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  7. 344ff02 Convert arm_setup_page_tables into a generic helper by Roberto Vargas · Fri Oct 19 16:44:18 2018 +0100
  8. 45a2c9e Rework page table setup for varying number of mem regions by Daniel Boulby · Fri Jul 06 16:54:44 2018 +0100
  9. e363146 Fix order of remaining platform #includes by Isla Mitchell · Fri Jul 14 10:46:32 2017 +0100
  10. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  11. 0fac5af Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · Wed Dec 28 16:11:41 2016 +0900
  12. 51bef61 Use *_END instead of *_LIMIT for linker derived end addresses by Masahiro Yamada · Wed Jan 18 02:10:08 2017 +0900
  13. 493bf33 Fix incorrect copyright notices by Antonio Nino Diaz · Wed Dec 14 14:31:32 2016 +0000
  14. 6d1ba58 zynqmp: Separate code and rodata by Soren Brinkmann · Fri Jul 08 14:45:14 2016 -0700
  15. ecdc4d3 ARM platforms: Add support for SEPARATE_CODE_AND_RODATA by Sandrine Bailleux · Fri Jul 08 14:38:16 2016 +0100
  16. 4a1267a Introduce arm_setup_page_tables() function by Sandrine Bailleux · Wed May 18 16:11:47 2016 +0100
  17. 99c0d7b zynqmp: Add option to select between Cadence UARTs by Soren Brinkmann · Fri Jun 10 09:57:14 2016 -0700
  18. a47e0f5 zynqmp: Remove unused/redundant #includes by Soren Brinkmann · Mon Apr 11 13:26:41 2016 -0700
  19. 76fcae3 Add support for Xilinx Zynq UltraScale+ MPSOC by Soren Brinkmann · Sun Mar 06 20:16:27 2016 -0800