1. 4fc00d2 refactor(cm): move EL3 registers to global context by Elizabeth Ho · 11 months ago
  2. 8ae58f0 refactor(cm): clean up SCR_EL3 and CPTR_EL3 initialization by Boyan Karatotev · 1 year, 2 months ago
  3. eee28e7 chore: update to use Arm word across TF-A by Govindraj Raja · 11 months ago
  4. 1e966f3 refactor(amu): separate the EL2 and EL3 enablement code by Boyan Karatotev · 1 year, 3 months ago
  5. 906776e refactor(amu): use new AMU feature check routines by Andre Przywara · 1 year, 4 months ago
  6. 0b7f1b0 refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 by Andre Przywara · 1 year, 3 months ago
  7. cc79927 fix(amu): limit virtual offset register access to NS world by John Powell · 2 years, 3 months ago
  8. e5dcf98 fix: libc: use long for 64-bit types on aarch64 by Scott Branden · 3 years, 10 months ago
  9. e9c3256 fix(amu): remove `amu_fconf.c` by Chris Kay · 2 years, 8 months ago
  10. 03be39d feat(mpmm): add support for MPMM by Chris Kay · 3 years, 2 months ago
  11. f11909f feat(amu): enable per-core AMU auxiliary counters by Chris Kay · 2 years, 10 months ago
  12. 26a7961 refactor(amu): refactor enablement and context switching by Chris Kay · 3 years, 1 month ago
  13. da81914 refactor(amu): detect auxiliary counters at runtime by Chris Kay · 3 years, 1 month ago
  14. a40141d refactor(amu): detect architected counters at runtime by Chris Kay · 3 years, 1 month ago
  15. 925fda4 refactor(amu): conditionally compile auxiliary counter support by Chris Kay · 3 years, 1 month ago
  16. a5fde28 refactor(amu): factor out register accesses by Chris Kay · 3 years, 1 month ago
  17. f13c6b5 refactor(amu)!: privatize unused AMU APIs by Chris Kay · 3 years, 1 month ago
  18. 1000ea8 build(amu): introduce `amu.mk` by Chris Kay · 3 years, 1 month ago
  19. cac7d16 fix(el3_runtime): fix SVE and AMU extension enablement flags by Arunachalam Ganapathy · 3 years ago
  20. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · 3 years, 9 months ago
  21. a9c4521 TF-A AMU: remove AMU enable info print by Olivier Deprez · 3 years, 11 months ago
  22. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · 4 years ago
  23. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · 5 years ago
  24. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  25. 033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · 6 years ago
  26. aaa1985 MISRA fixes for AMU/SPE and SVE by Dimitris Papastamos · 6 years ago
  27. e0848e9 aarch32: Fix multiple bugs in amu_helpers.S by Dimitris Papastamos · 6 years ago
  28. 430f115 Assert that group0/group1 counter config is what we expect by Dimitris Papastamos · 6 years ago
  29. 0dcdd8d AMU: Implement context save/restore for aarch32 by Joel Hutton · 7 years ago
  30. 2691bc6 AMU: Add assembler helper functions for aarch32 by Joel Hutton · 7 years ago
  31. 7c4a6e6 AMU: Remove unnecessary WARN() by Dimitris Papastamos · 6 years ago
  32. eaf3e6d AMU: Add hooks to save/restore AMU context by Dimitris Papastamos · 7 years ago
  33. 525c37a AMU: Add configuration helpers for aarch64 by Dimitris Papastamos · 7 years ago
  34. 60346db AMU: Add plat interface to select which group 1 counters to enable by Dimitris Papastamos · 7 years ago
  35. dda48b0 AMU: Implement support for aarch32 by Dimitris Papastamos · 7 years ago
  36. e08005a AMU: Implement support for aarch64 by Dimitris Papastamos · 7 years ago