1. 8ce3394 feat(trf): initialize trap settings of trace filter control registers access by Manish V Badarkhe · 3 years, 4 months ago
  2. f7ee064 feat(sys_reg_trace): initialize trap settings of trace system registers access by Manish V Badarkhe · 3 years, 4 months ago
  3. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · 4 years, 1 month ago
  4. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · 4 years ago
  5. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · 4 years, 3 months ago
  6. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · 4 years, 4 months ago
  7. 90d6532 Provide a hint to power controller for DSU cluster power down by Madhukar Pappireddy · 5 years ago
  8. a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · 4 years, 8 months ago
  9. 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
  10. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · 5 years ago
  11. 007d745 arch: add some defines for generic timer registers by Yann Gautier · 6 years ago
  12. f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · 6 years ago
  13. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · 6 years ago
  14. d29d21e drivers: generic_delay_timer: Assert presence of Generic Timer by Antonio Nino Diaz · 6 years ago
  15. c326c34 xlat v2: Dynamically detect need for CnP bit by Antonio Nino Diaz · 6 years ago
  16. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  17. 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · 6 years ago[Renamed from include/lib/aarch32/arch.h]
  18. 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · 6 years ago