1. 5118b53 Tegra: configure TZDRAM fence during early setup by Varun Wadekar · 8 years ago
  2. b7b4575 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · 9 years ago
  3. 3f0a8ad Tegra: handler for per-soc early setup by Varun Wadekar · 9 years ago
  4. 1ec441e Tegra: relocate code to BL31_BASE during cold boot by Varun Wadekar · 9 years ago
  5. d151363 Tegra: memmap BL31's TZDRAM carveout by Varun Wadekar · 9 years ago
  6. 0dc9181 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · 9 years ago
  7. 1dcffa9 Tegra: enable runtime console by Varun Wadekar · 9 years ago
  8. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · 9 years ago
  9. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · 9 years ago
  10. baf903e Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · 9 years ago
  11. 0fac5af Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · 8 years ago
  12. e1eaf8e Tegra: memmap the actual memory available for BL31 by Varun Wadekar · 9 years ago
  13. c8bfe2e Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · 9 years ago
  14. bc74fec Tegra: introduce delay timer support by Varun Wadekar · 9 years ago
  15. 207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · 9 years ago
  16. f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · 9 years ago
  17. 7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · 9 years ago
  18. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · 9 years ago
  19. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 9 years ago