Log - 50c328a95c55ff00193d09395a20e42735e57824 - filogic/atf

4fc00d2 refactor(cm): move EL3 registers to global context by Elizabeth Ho · Tue Jul 18 14:10:25 2023 +0100
8ae58f0 refactor(cm): clean up SCR_EL3 and CPTR_EL3 initialization by Boyan Karatotev · Thu Apr 20 11:00:50 2023 +0100
eee28e7 chore: update to use Arm word across TF-A by Govindraj Raja · Tue Aug 01 15:52:40 2023 -0500
1e966f3 refactor(amu): separate the EL2 and EL3 enablement code by Boyan Karatotev · Mon Mar 27 17:02:43 2023 +0100
906776e refactor(amu): use new AMU feature check routines by Andre Przywara · Fri Mar 03 10:30:06 2023 +0000
0b7f1b0 refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 by Andre Przywara · Tue Mar 21 13:53:19 2023 +0000
cc79927 fix(amu): limit virtual offset register access to NS world by John Powell · Tue Mar 29 00:25:59 2022 -0500
e5dcf98 fix: libc: use long for 64-bit types on aarch64 by Scott Branden · Tue Aug 25 13:49:32 2020 -0700
e9c3256 fix(amu): remove `amu_fconf.c` by Chris Kay · Mon Nov 01 11:11:45 2021 +0000
03be39d feat(mpmm): add support for MPMM by Chris Kay · Wed May 05 13:38:30 2021 +0100
f11909f feat(amu): enable per-core AMU auxiliary counters by Chris Kay · Thu Aug 19 11:21:52 2021 +0100
26a7961 refactor(amu): refactor enablement and context switching by Chris Kay · Mon May 24 20:35:26 2021 +0100
da81914 refactor(amu): detect auxiliary counters at runtime by Chris Kay · Tue May 25 15:24:18 2021 +0100
a40141d refactor(amu): detect architected counters at runtime by Chris Kay · Tue May 25 12:33:18 2021 +0100
925fda4 refactor(amu): conditionally compile auxiliary counter support by Chris Kay · Tue May 25 10:42:56 2021 +0100
a5fde28 refactor(amu): factor out register accesses by Chris Kay · Wed May 26 11:58:23 2021 +0100
f13c6b5 refactor(amu)!: privatize unused AMU APIs by Chris Kay · Mon May 24 21:00:07 2021 +0100
1000ea8 build(amu): introduce `amu.mk` by Chris Kay · Wed May 19 19:24:37 2021 +0100
cac7d16 fix(el3_runtime): fix SVE and AMU extension enablement flags by Arunachalam Ganapathy · Thu Jul 08 09:35:57 2021 +0100
fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · Fri Oct 02 13:41:11 2020 -0500
a9c4521 TF-A AMU: remove AMU enable info print by Olivier Deprez · Thu Aug 13 12:55:54 2020 +0200
7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · Tue Jul 14 08:17:56 2020 +0100
90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · Thu Oct 25 16:52:26 2018 +0100
aaa1985 MISRA fixes for AMU/SPE and SVE by Dimitris Papastamos · Mon Feb 26 17:56:31 2018 +0000
e0848e9 aarch32: Fix multiple bugs in amu_helpers.S by Dimitris Papastamos · Tue Feb 20 12:25:36 2018 +0000
430f115 Assert that group0/group1 counter config is what we expect by Dimitris Papastamos · Tue Feb 20 11:16:44 2018 +0000
0dcdd8d AMU: Implement context save/restore for aarch32 by Joel Hutton · Thu Dec 21 15:21:20 2017 +0000
2691bc6 AMU: Add assembler helper functions for aarch32 by Joel Hutton · Tue Dec 12 15:47:55 2017 +0000
7c4a6e6 AMU: Remove unnecessary WARN() by Dimitris Papastamos · Mon Jan 15 14:52:57 2018 +0000
eaf3e6d AMU: Add hooks to save/restore AMU context by Dimitris Papastamos · Tue Nov 28 13:47:06 2017 +0000
525c37a AMU: Add configuration helpers for aarch64 by Dimitris Papastamos · Mon Nov 13 09:49:45 2017 +0000
60346db AMU: Add plat interface to select which group 1 counters to enable by Dimitris Papastamos · Wed Dec 13 10:54:37 2017 +0000
dda48b0 AMU: Implement support for aarch32 by Dimitris Papastamos · Tue Oct 17 14:03:14 2017 +0100
e08005a AMU: Implement support for aarch64 by Dimitris Papastamos · Thu Oct 12 13:02:29 2017 +0100