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git01.mediatek.com / filogic / atf / 506da9307ea9bb79d86f97fb6d6da9b5a651af58 / plat / intel / soc / n5x / platform.mk
  1. c5a3e3a feat(intel): enable SDMMC frontdoor load for ATF->Linux by Jit Loon Lim · Mon Oct 16 00:19:34 2023 +0800
  2. ef2b295 chore: remove MULTI_CONSOLE_API references by Michal Simek · Tue Sep 12 15:26:42 2023 +0200
  3. f48707a feat(intel): implement timer init divider via CPU frequency for N5X by Sieu Mun Tang · Thu Jun 23 18:05:02 2022 +0800
  4. 11b9b49 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 by Arvind Ram Prakash · Tue Nov 22 14:41:00 2022 -0600
  5. 55803a2 fix(intel): fix UART baud rate and clock by Sieu Mun Tang · Fri Jul 01 09:08:57 2022 +0800
  6. 044ed48 feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands by Sieu Mun Tang · Wed May 11 10:45:19 2022 +0800
  7. 1e5550b build(intel): enable access to on-chip ram in BL31 for N5X by Boon Khai Ng · Fri May 21 22:56:37 2021 +0800
  8. dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · Mon Mar 07 12:13:04 2022 +0800
  9. f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · Mon Jun 29 12:15:27 2020 +0800
  10. 8881ad0 build(intel): add N5X as a new Intel platform by Sieu Mun Tang · Mon Mar 07 12:04:59 2022 +0800