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git01.mediatek.com / filogic / atf / 4a20f35522851d4730ae27afeccfafd74e44fed1 / plat / nvidia / tegra / include / t210
  1. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  2. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  3. a59a7c5 Tegra: memctrl: check GPU reset state from common place by Varun Wadekar · 8 years ago
  4. 761ca73 Tegra: add explicit casts for integer macros by Varun Wadekar · 8 years ago
  5. f68b96c Tegra: Break circular dependency in platform header files by Sandrine Bailleux · 7 years ago
  6. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  7. 4d160ac Tegra: memmap Tegra micro-seconds timer controller by Steven Kao · 8 years ago
  8. 64443ca Tegra: drivers: memctrl: move chip specific defines to tegra_def.h by Varun Wadekar · 8 years ago
  9. 28dcc21 Tegra: support for silicon/simulation platforms by Varun Wadekar · 8 years ago
  10. 3ce5499 Tegra: define platform power states by Varun Wadekar · 9 years ago
  11. 0dc9181 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · 9 years ago
  12. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · 9 years ago
  13. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · 9 years ago
  14. bc78744 Tegra210: enable WRAP to INCR burst type conversions by Varun Wadekar · 9 years ago
  15. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · 9 years ago
  16. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 9 years ago