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git01.mediatek.com / filogic / atf / 4a0b37af763af079509aad0d9668d4fe1c703cf9 / plat / nvidia
  1. 4a0b37a Tegra186: implement `get_target_pwr_state` handler by Varun Wadekar · Sat Apr 09 00:36:42 2016 -0700
  2. c47504f Tegra186: mce: add the mce_update_cstate_info() helper function by Varun Wadekar · Thu Mar 23 17:32:20 2017 -0700
  3. c39be23 Merge pull request #875 from vwadekar/tegra186-platform-support-v2 by davidcunado-arm · Thu Mar 30 21:43:56 2017 +0100
  4. 8cbdab2 Merge pull request #870 from douglas-raillard-arm/dr/remove_asm_signed_test by davidcunado-arm · Wed Mar 29 09:58:20 2017 +0100
  5. 5a40256 Tegra186: reset CPU power state info while onlining by Varun Wadekar · Fri Apr 29 11:25:46 2016 -0700
  6. 66ff012 Tegra186: fix recursion in included headers (tegra_def.h/platform_def.h) by Varun Wadekar · Tue Apr 26 11:34:54 2016 -0700
  7. 9c24a55 Tegra: memctrl_v2: fix logic to calculate TZRAM_ADDR_HI bits by Varun Wadekar · Tue Apr 26 11:14:46 2016 -0700
  8. d97f9cf Merge pull request #873 from dp-arm/dp/makefile-reorg by davidcunado-arm · Mon Mar 27 11:44:05 2017 +0100
  9. 7058aee Tegra: memctrl_v2: program Video Memory carveout size in MBs by Varun Wadekar · Mon Apr 25 09:01:46 2016 -0700
  10. 0012d05 Tegra: memctrl_v2: no stream ID override for Security Engine by Varun Wadekar · Tue Apr 19 14:22:13 2016 -0700
  11. d2da47a Tegra186: reset power state info during CPU_ON by Varun Wadekar · Sat Apr 09 00:40:45 2016 -0700
  12. e2bc7f2 Tegra186: enable support for simulation environment by Varun Wadekar · Sat Apr 02 15:41:20 2016 -0700
  13. 47ddd00 Tegra186: check MCE firmware version during boot by Varun Wadekar · Mon Mar 28 16:00:02 2016 -0700
  14. a9002bb Tegra186: fix programming sequence for SC7/SC8 entry by Varun Wadekar · Mon Mar 28 15:11:43 2016 -0700
  15. 698e7c6 Tegra186: program default core wake mask during CPU_SUSPEND by Varun Wadekar · Mon Mar 28 15:05:03 2016 -0700
  16. 920fce8 Tegra186: clear the system cstate for offline core by Varun Wadekar · Mon Mar 28 14:43:03 2016 -0700
  17. 9610573 Tegra: memctrl_v2: enable APE overrides for chip verification by Varun Wadekar · Mon Mar 28 14:28:09 2016 -0700
  18. ad2824f Tegra186: mce: enable LATIC for chip verification by Varun Wadekar · Mon Mar 28 13:44:35 2016 -0700
  19. 93bed2a Tegra186: save/restore BL31 context to/from TZDRAM by Varun Wadekar · Fri Mar 18 13:07:33 2016 -0700
  20. a0f2697 Tegra186: re-configure MSS' client settings by Varun Wadekar · Fri Mar 11 17:18:51 2016 -0800
  21. b877615 Tegra186: implement support for System Suspend by Varun Wadekar · Thu Mar 03 13:52:52 2016 -0800
  22. 87e44ff Tegra186: memctrl_v2: restore video memory settings by Varun Wadekar · Thu Mar 03 13:22:39 2016 -0800
  23. 3c95993 Tegra186: smmu: driver for the smmu hardware block by Varun Wadekar · Thu Mar 03 13:09:08 2016 -0800
  24. 2bb9f47 Tegra: replace ASM signed tests with unsigned by Douglas Raillard · Mon Mar 20 10:38:29 2017 +0000
  25. d66ee54 Tegra186: implement quasi power off (SC8) state by Varun Wadekar · Mon Feb 29 10:24:30 2016 -0800
  26. e26a55a Tegra186: disable DCO operations for PSCI_CPU_OFF by Varun Wadekar · Fri Feb 26 11:09:21 2016 -0800
  27. cad7b08 Tegra186: register FIQ interrupt sources by Varun Wadekar · Mon Dec 28 18:12:59 2015 -0800
  28. 6c5b98f Tegra: memctrl_v2: set NO_OVERRIDE for APE clients by Varun Wadekar · Wed Feb 17 15:31:25 2016 -0800
  29. c9ac3e4 Tegra: memctrl_v2: implement MC txn override WAR by Varun Wadekar · Wed Feb 17 15:07:49 2016 -0800
  30. e60f1bf Tegra: memctrl_v2: check GPU state before VPR programming by Varun Wadekar · Wed Feb 17 10:10:50 2016 -0800
  31. de729d6 Tegra: memctrl_v2: no SID override for SCE block by Varun Wadekar · Wed Feb 17 10:01:28 2016 -0800
  32. 8964509 Tegra186: fix per-cpu wake times for CPU power states by Varun Wadekar · Tue Feb 09 14:55:44 2016 -0800
  33. a7c1ea7 Tegra186: add Video memory carveout settings by Varun Wadekar · Wed Feb 03 09:51:25 2016 -0800
  34. 4223657 Tegra186: support for C6/C7 CPU_SUSPEND states by Varun Wadekar · Mon Jan 18 19:03:19 2016 -0800
  35. 13e7dc4 Tegra: memctrl_v2: secure the on-chip TZSRAM memory by Varun Wadekar · Wed Dec 30 15:15:08 2015 -0800
  36. c2c3a2a Tegra186: support for the latest platform port handlers by Varun Wadekar · Fri Jan 08 17:38:51 2016 -0800
  37. 38020c9 Tegra186: implement prepare_system_reset handler by Varun Wadekar · Thu Jan 07 14:36:12 2016 -0800
  38. a64806a Tegra186: implement CPU_OFF handler by Varun Wadekar · Tue Jan 05 15:17:41 2016 -0800
  39. 20c9429 Tegra186: update SYSCNT_FREQ to 31.25MHz by Varun Wadekar · Mon Jan 04 10:57:45 2016 -0800
  40. 94d8532 Tegra186: relocate bl31.bin to the SYSRAM by Varun Wadekar · Mon Nov 30 12:05:04 2015 -0800
  41. 782c83d Tegra186: implement prepare_system_off handler by Varun Wadekar · Tue Mar 14 14:25:35 2017 -0700
  42. abd153c Tegra186: power on/off secondary CPUs by Varun Wadekar · Mon Sep 14 09:31:39 2015 +0530
  43. 59c3aa0 Tegra186: SiP calls to interact with the MCE driver by Varun Wadekar · Wed Sep 09 11:33:08 2015 +0530
  44. a0352ab Tegra186: mce: driver for the CPU complex power manager block by Varun Wadekar · Tue Mar 14 14:24:35 2017 -0700
  45. 921b906 Tegra186: platform support for Tegra "T186" SoC by Varun Wadekar · Tue Aug 25 17:03:14 2015 +0530
  46. cd5a2f5 Tegra: memctrl_v2: Memory Controller Driver (v2) by Varun Wadekar · Sun Sep 20 15:08:22 2015 +0530
  47. fc9b91e Tegra: public interfaces to get the chip's major/minor versions by Varun Wadekar · Fri Mar 10 09:53:37 2017 -0800
  48. 230011c Move plat/common source file definitions to generic Makefiles by dp-arm · Tue Mar 07 11:02:47 2017 +0000
  49. 1108fc6 plat/tegra: Enable Cortex-A53 erratum 855873 workaround by Andre Przywara · Mon Nov 07 10:53:14 2016 +0000
  50. ed3c62b Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs by Varun Wadekar · Mon Mar 06 09:15:15 2017 -0800
  51. 3fb854f Tegra: enable SEPARATE_CODE_AND_RODATA build flag by Varun Wadekar · Tue Feb 28 08:23:59 2017 -0800
  52. 20e9fef Tegra210: assert if afflvl0/1 have incorrect state-ids by Harvey Hsieh · Wed Dec 28 21:53:18 2016 +0800
  53. e0f3dfd Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · Tue Oct 11 18:59:52 2016 +0800
  54. 2c60b0a Tegra: increase ADDR_SPACE_SIZE to 35 bits by Steven Kao · Thu Nov 24 19:24:37 2016 +0800
  55. 777baa5 Tegra: init the console only if the platform supports it by Damon Duan · Mon Nov 07 19:37:50 2016 +0800
  56. 1edb882 Tegra210: new TZDRAM base address by Varun Wadekar · Thu Sep 01 14:59:32 2016 -0700
  57. dba8007 Tegra210: set core power state during cluster power down by Varun Wadekar · Thu Sep 01 14:56:17 2016 -0700
  58. 14eaede Tegra: calculate proper power state for affinity levels by Varun Wadekar · Thu Sep 01 14:51:59 2016 -0700
  59. bfc6605 Tegra: fix logic to calculate GICD_ISPENDR register address by Varun Wadekar · Tue Aug 23 14:01:19 2016 -0700
  60. a2c6be6 Tegra: uninit and re-init console across System Suspend by Varun Wadekar · Mon Aug 01 22:16:21 2016 -0700
  61. 28dcc21 Tegra: support for silicon/simulation platforms by Varun Wadekar · Wed Jul 20 10:28:51 2016 -0700
  62. f2aa1be Tegra: per-soc `get_target_pwr_state` handler by Varun Wadekar · Tue Jun 07 12:00:06 2016 -0700
  63. b41a414 Tegra: relocate BL32 image to TZDRAM memory by Varun Wadekar · Mon May 23 15:56:14 2016 -0700
  64. d22d4ad Tegra: get BL31 arguments from previous bootloader by Varun Wadekar · Mon May 23 11:41:07 2016 -0700
  65. 197a75f Tegra: return BL32 entry point info if it is valid by Varun Wadekar · Mon Jun 06 10:46:28 2016 -0700
  66. 5118b53 Tegra: configure TZDRAM fence during early setup by Varun Wadekar · Sat Jun 04 22:08:50 2016 -0700
  67. d5f578a Tegra: restore TZRAM settings on "System Resume" by Varun Wadekar · Wed Jun 01 19:34:37 2016 -0700
  68. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · Thu May 12 13:43:33 2016 -0700
  69. c6c386d Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 by Varun Wadekar · Fri May 20 16:21:22 2016 -0700
  70. dc79930 Tegra: implement FIQ interrupt handler by Varun Wadekar · Mon Dec 28 16:36:42 2015 -0800
  71. b7b4575 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · Mon Dec 28 14:55:41 2015 -0800
  72. 2497539 Tegra: implement common handler `plat_get_target_pwr_state()` by Varun Wadekar · Thu May 05 14:13:30 2016 -0700
  73. 25e658e Tegra: include platform_def.h to access UART macros by Varun Wadekar · Tue Apr 26 11:38:38 2016 -0700
  74. 2330edd Tegra: allow SiP smc calls from Secure World by Wayne Lin · Thu Mar 31 13:49:09 2016 -0700
  75. 3f0a8ad Tegra: handler for per-soc early setup by Varun Wadekar · Mon Mar 28 15:56:47 2016 -0700
  76. 1ec441e Tegra: relocate code to BL31_BASE during cold boot by Varun Wadekar · Thu Mar 24 15:34:24 2016 -0700
  77. 79fa1a4 Tegra: Disable A57/A53 cache non-temporal hints by Varun Wadekar · Mon Mar 21 11:18:40 2016 -0700
  78. d22429d Tegra: implement pwr_domain_pwr_down_wfi() handler by Varun Wadekar · Fri Mar 18 14:35:28 2016 -0700
  79. d151363 Tegra: memmap BL31's TZDRAM carveout by Varun Wadekar · Fri Mar 18 13:01:12 2016 -0700
  80. e032363 Tegra: increase BL31 image size to 256KB by Varun Wadekar · Thu Mar 03 18:27:28 2016 -0800
  81. 6eec6d6 Tegra: allow individual SoCs to restore their settings by Varun Wadekar · Thu Mar 03 13:28:10 2016 -0800
  82. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · Mon Feb 22 11:09:41 2016 -0800
  83. 6077dce Tegra: enable PSCI extended state ID processing by Varun Wadekar · Wed Jan 27 11:31:06 2016 -0800
  84. 3ce5499 Tegra: define platform power states by Varun Wadekar · Tue Jan 19 13:55:19 2016 -0800
  85. 0dc9181 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · Wed Dec 30 15:06:41 2015 -0800
  86. 1dcffa9 Tegra: enable runtime console by Varun Wadekar · Fri Jan 08 17:48:42 2016 -0800
  87. e5caeed Tegra: PM: soc-specific system off handler by Varun Wadekar · Thu Jan 07 14:04:21 2016 -0800
  88. 923d04a Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · Wed Dec 09 18:18:53 2015 -0800
  89. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · Thu Oct 29 10:37:28 2015 +0530
  90. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · Tue Oct 06 12:49:31 2015 +0530
  91. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · Fri Sep 18 11:21:22 2015 +0530
  92. baf903e Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · Tue Sep 22 15:00:06 2015 +0530
  93. 39f87d1 Tegra: use ClusterId for calculating core position by Varun Wadekar · Tue Sep 22 13:45:07 2015 +0530
  94. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · Tue Sep 22 13:33:56 2015 +0530
  95. 97f2490 Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform by Varun Wadekar · Wed Sep 09 11:29:24 2015 +0530
  96. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · Thu Sep 03 14:32:44 2015 +0530
  97. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · Tue Aug 25 17:01:06 2015 +0530
  98. a8954fc Replace some memset call by zeromem by Douglas Raillard · Thu Jan 26 15:54:44 2017 +0000
  99. 21362a9 Introduce unified API to zero memory by Douglas Raillard · Fri Dec 02 13:51:54 2016 +0000
  100. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · Sun Dec 25 23:36:24 2016 +0900