1. d019487 Introduce PSCI Library Interface by Soby Mathew · Fri Apr 29 19:01:30 2016 +0100
  2. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · Thu Mar 24 16:56:29 2016 +0000
  3. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · Thu Jun 16 14:52:04 2016 +0100
  4. ba39fc6 Merge pull request #662 from sandrine-bailleux-arm/sb/rodata-xn by danh-arm · Fri Jul 15 18:55:43 2016 +0100
  5. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · Fri Jul 01 12:52:41 2016 +0530
  6. 7659a26 Introduce utils.h header file by Sandrine Bailleux · Tue Jul 05 09:55:03 2016 +0100
  7. ac3aa68 xlat lib: Introduce MT_EXECUTE/MT_EXECUTE_NEVER attributes by Sandrine Bailleux · Tue Jun 14 16:31:09 2016 +0100
  8. 7528b68 xlat lib: Refactor mmap_desc() function by Sandrine Bailleux · Tue Jun 14 16:29:04 2016 +0100
  9. 9518d02 Add Performance Measurement Framework(PMF) by Yatharth Kochar · Fri Mar 11 14:20:19 2016 +0000
  10. a83af08 Merge pull request #639 from danh-arm/dh/import-libfdt by danh-arm · Wed Jun 08 13:20:35 2016 +0100
  11. fc0c645 Minor libfdt changes to enable TF integration by Dan Handley · Thu Jun 02 15:28:23 2016 +0100
  12. 32f2130 Import libfdt v1.4.1 by Dan Handley · Thu Jun 02 14:23:40 2016 +0100
  13. d7b59e4 Move stdlib header files to include/lib/stdlib by Dan Handley · Thu Jun 02 17:15:13 2016 +0100
  14. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · Tue Feb 09 12:00:03 2016 +0000
  15. 4ba6b0b Fix computation of L1 bitmask in the translation table lib by Sandrine Bailleux · Fri Apr 22 10:47:33 2016 +0100
  16. b4444e3 Merge pull request #601 from sandrine-bailleux-arm/sb/a57-errata-workarounds by danh-arm · Fri Apr 22 10:13:16 2016 +0100
  17. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · Thu Apr 21 11:10:52 2016 +0100
  18. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · Thu Apr 14 14:24:13 2016 +0100
  19. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · Thu Apr 14 14:18:07 2016 +0100
  20. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · Thu Apr 14 14:04:48 2016 +0100
  21. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · Thu Apr 14 13:32:31 2016 +0100
  22. afa8a78 Fix wording in cpu-ops.mk comments by Sandrine Bailleux · Thu Apr 14 12:59:42 2016 +0100
  23. b5e7f77 Limit support for region overlaps in xlat_tables by Antonio Nino Diaz · Wed Mar 30 15:45:57 2016 +0100
  24. 44170c4 Refactor the xlat_tables library code by Soby Mathew · Tue Mar 22 15:51:08 2016 +0000
  25. 346f1f9 Remove xlat_helpers.c by Antonio Nino Diaz · Thu Mar 31 09:08:56 2016 +0100
  26. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · Mon Mar 21 10:36:47 2016 +0000
  27. 686ecbd Merge pull request #542 from sandrine-bailleux-arm/km/pt-zero by danh-arm · Fri Mar 11 04:45:32 2016 +0000
  28. 299d794 Merge pull request #538 from sandrine-bailleux-arm/sb/extend-memory-types by danh-arm · Fri Mar 11 04:45:19 2016 +0000
  29. ed0995c Initialize all translation table entries by Kristina Martsenko · Thu Feb 11 18:11:56 2016 +0000
  30. 52b1ba6 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · Tue Mar 01 14:01:03 2016 +0000
  31. 95036fc Compile stdlib C files individually by Antonio Nino Diaz · Fri Feb 26 10:46:44 2016 +0000
  32. f12a31d Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · Fri Jan 29 14:37:58 2016 +0000
  33. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · Wed Jan 13 14:57:38 2016 +0000
  34. c9bac9c Use tf_printf() for debug logs from xlat_tables.c by Soby Mathew · Tue Jan 19 17:52:28 2016 +0000
  35. 46dd170 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · Thu Jan 14 10:11:05 2016 -0800
  36. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · Thu Jan 07 16:52:49 2016 +0000
  37. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  38. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · Thu Sep 10 11:39:36 2015 +0100
  39. 3543c7b Merge pull request #361 from achingupta/for_sm/psci_proto_v5 by Achin Gupta · Mon Aug 17 14:56:31 2015 +0100
  40. 3700a92 PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · Mon Jul 13 11:21:11 2015 +0100
  41. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · Wed Jul 29 20:55:31 2015 +0800
  42. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · Tue Jul 14 17:11:20 2015 +0530
  43. 03fe10c Fix bug in semihosting write function by Juan Castillo · Tue Jul 07 15:36:33 2015 +0100
  44. e364a8a Fix recursive crash prints on FVP AEM model by Soby Mathew · Mon Apr 13 16:57:12 2015 +0100
  45. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  46. 05cbb00 Merge pull request #277 from soby-mathew/sm/coh_lock_opt by danh-arm · Wed Apr 01 11:39:56 2015 +0100
  47. 156280c Remove the `owner` field in bakery_lock_t data structure by Soby Mathew · Fri Feb 20 16:04:17 2015 +0000
  48. a0a897d Optimize the bakery lock structure for coherent memory by Soby Mathew · Thu Feb 19 16:23:51 2015 +0000
  49. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · Thu Mar 19 19:33:06 2015 +0000
  50. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · Tue Feb 17 11:50:28 2015 +0000
  51. 356d59d Merge pull request #269 from vikramkanigiri/vk/common-cci by danh-arm · Tue Mar 17 14:28:48 2015 +0000
  52. 725b133 Add macro to calculate number of elements in an array by Vikram Kanigiri · Wed Mar 04 10:34:27 2015 +0000
  53. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · Thu Jan 29 18:27:38 2015 +0000
  54. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · Thu Jan 29 12:00:58 2015 +0000
  55. 9e75157 stdlib: add missing features to build PolarSSL by Juan Castillo · Mon Nov 17 17:27:41 2014 +0000
  56. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · Thu Nov 20 18:09:41 2014 +0000
  57. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · Thu Jan 08 18:02:19 2015 +0000
  58. 6b98c7d Remove the wfe() for bounded wait in bakery_lock by Soby Mathew · Tue Nov 18 10:45:04 2014 +0000
  59. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · Tue Nov 18 10:14:14 2014 +0000
  60. ed04c4a Precede a 'sev' with a 'dsb' in bakery lock code by Achin Gupta · Mon Nov 10 11:50:30 2014 +0000
  61. 937488b Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · Mon Sep 22 14:13:34 2014 +0100
  62. 1604fa0 Optimize barrier usage during Cortex-A57 power down by Soby Mathew · Mon Sep 22 12:15:26 2014 +0100
  63. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · Mon Sep 22 12:11:36 2014 +0100
  64. 42aa5eb Add support for level specific cache maintenance operations by Soby Mathew · Tue Sep 02 10:47:33 2014 +0100
  65. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · Thu Aug 14 16:19:29 2014 +0100
  66. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · Thu Aug 14 13:36:41 2014 +0100
  67. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  68. f1785fd Add platform API for reset handling by Soby Mathew · Thu Aug 14 12:22:32 2014 +0100
  69. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100
  70. 7b83c44 Move IO storage source to drivers directory by Dan Handley · Tue Aug 12 14:20:28 2014 +0100
  71. 3aa9216 Remove redundant io_init() function by Dan Handley · Mon Aug 04 18:31:43 2014 +0100
  72. 91b624e Rationalize console log output by Dan Handley · Tue Jul 29 17:14:00 2014 +0100
  73. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · Mon Jul 28 14:28:40 2014 +0100
  74. 3299181 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · Mon Jul 28 14:27:25 2014 +0100
  75. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · Mon Jul 28 14:24:52 2014 +0100
  76. 041f62a Implement an assert() callable from assembly code by Soby Mathew · Mon Jul 14 16:58:03 2014 +0100
  77. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  78. afe7e2f Implement a leaner printf for Trusted Firmware by Soby Mathew · Thu Jun 12 17:23:58 2014 +0100
  79. e998254 Make enablement of the MMU more flexible by Achin Gupta · Thu Jun 26 08:59:07 2014 +0100
  80. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · Fri Jun 27 16:56:30 2014 -0700
  81. 22129f5 Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · Thu Jun 26 23:02:28 2014 +0100
  82. af9dd82 Inline the mmio accessor functions by Andrew Thoelke · Tue Jun 24 14:18:35 2014 +0100
  83. 958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · Mon Jun 09 12:54:15 2014 +0100
  84. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · Mon Jun 16 12:41:48 2014 +0100
  85. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · Mon Jun 02 15:44:43 2014 +0100
  86. 1359236 Enable mapping higher physical address by Lin Ma · Mon Jun 02 11:45:36 2014 -0700
  87. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  88. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  89. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  90. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  91. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 12:00:17 2014 +0100
  92. 8782852 Merge pull request #91 from linmaonly/lin_dev by Andrew Thoelke · Thu May 22 12:31:20 2014 +0100
  93. 0b9d59f Address issue 156: 64-bit addresses get truncated by Lin Ma · Tue May 20 11:25:55 2014 -0700
  94. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · Mon Apr 07 15:28:55 2014 +0100
  95. 6bdfa91 Merge pull request #58 from athoelke/optimise-cache-flush-v2 by danh-arm · Thu May 08 12:01:10 2014 +0100
  96. 6a5b3a4 Optimise data cache clean/invalidate operation by Andrew Thoelke · Fri Apr 25 10:49:30 2014 +0100
  97. 5879ffd Remove unused or invalid asm helper functions by Andrew Thoelke · Mon Apr 28 12:33:52 2014 +0100
  98. f977ed8 Access system registers directly in assembler by Andrew Thoelke · Mon Apr 28 12:32:02 2014 +0100
  99. 438c63a Replace disable_mmu with assembler version by Andrew Thoelke · Mon Apr 28 12:06:18 2014 +0100
  100. 42e75a7 Correct usage of data and instruction barriers by Andrew Thoelke · Mon Apr 28 12:28:39 2014 +0100