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git01.mediatek.com / filogic / atf / 470463fddf9a8ba9adbe8fff8e76853859bd2410 / plat
  1. 4f2d8ac rockchip: Prevent macro expansion in paths by Joshua Watt · Fri Dec 13 13:44:55 2019 -0600
  2. 3c42353 Merge "allwinner: Fix incorrect ARISC code patch offset check" into integration by Soby Mathew · Fri Dec 13 17:20:04 2019 +0000
  3. 035ffaf Merge "allwinner: power: Add DLDO4 power rail" into integration by Sandrine Bailleux · Fri Dec 13 08:47:28 2019 +0000
  4. 0963794 Merge "intel: s10: Remove unused source code" into integration by Sandrine Bailleux · Fri Dec 13 07:20:50 2019 +0000
  5. 0c98ae8 intel: s10: Remove unused source code by Hadi Asyrafi · Thu Dec 12 10:46:09 2019 +0800
  6. fc8f2c5 Tegra194: smmu: add support for backup multiple smmu regs by Pritesh Raithatha · Thu Oct 26 17:06:02 2017 +0530
  7. 8a45c72 Tegra194: introduce tegra_mc_def.h by Pritesh Raithatha · Fri Dec 15 15:00:09 2017 -0800
  8. 0e6dce6 Tegra194: 40-bit wide memory address space by Steven Kao · Fri Feb 09 21:01:49 2018 +0800
  9. 56c6459 Tegra194: psci: rename 'percpu_data' variable by Varun Wadekar · Tue Dec 03 08:50:57 2019 -0800
  10. 545be72 Merge "Use the proper size for tb_fw_cfg_dtb" into integration by Alexei Fedorov · Tue Dec 10 12:07:27 2019 +0000
  11. 40bacc9 Merge "arm: Fix current RECLAIM_INIT_CODE behavior" into integration by Sandrine Bailleux · Tue Dec 10 11:53:50 2019 +0000
  12. e8b10e2 arm: Fix current RECLAIM_INIT_CODE behavior by Ambroise Vincent · Tue Jul 16 17:19:38 2019 +0100
  13. 73d42d7 Use the proper size for tb_fw_cfg_dtb by Louis Mayencourt · Mon Dec 09 11:29:38 2019 +0000
  14. 0e21aa0 Merge changes from topic "allwinner_bl31_size" into integration by Soby Mathew · Fri Dec 06 09:43:28 2019 +0000
  15. d16e91b Merge "intel: Refactor common platform code [5/5]" into integration by Mark Dykes · Wed Dec 04 19:03:52 2019 +0000
  16. 2a3999d Merge changes from topic "platform-refactor" into integration by Mark Dykes · Wed Dec 04 19:03:01 2019 +0000
  17. e44c449 Merge "rockchip: px30: Add support for UART3 as serial output" into integration by Manish Pandey · Wed Dec 04 13:52:37 2019 +0000
  18. 19893cc imx: Fix multiple definition of ipc_handle by Samuel Holland · Wed Dec 04 02:45:58 2019 -0600
  19. e6c9495 imx: Fix missing inclusion of cdefs.h by Samuel Holland · Wed Dec 04 02:48:37 2019 -0600
  20. ac684b9 allwinner: Fix incorrect ARISC code patch offset check by Samuel Holland · Sun Oct 20 14:18:48 2019 -0500
  21. d7dd85f Merge "Enable -Wlogical-op always" into integration by Manish Pandey · Tue Dec 03 23:21:54 2019 +0000
  22. 2afd023 Merge "Enable -Wshadow always" into integration by Manish Pandey · Tue Dec 03 23:21:38 2019 +0000
  23. 16d8990 Merge "plat/rockchip: initialize reset and poweroff GPIOs with known invalid value" into integration by Manish Pandey · Tue Dec 03 22:57:57 2019 +0000
  24. c7ebcc8 Merge changes from topic "tegra-downstream-092319" into integration by Sandrine Bailleux · Tue Dec 03 07:53:45 2019 +0000
  25. 0f174f1 Tegra194: add support to reset GPU by Jeetesh Burman · Mon Jan 22 16:52:11 2018 +0530
  26. b2b4305 Tegra194: memctrl: fix logic to check TZDRAM config register access by Steven Kao · Thu Nov 30 11:53:29 2017 +0800
  27. 9d15f7e Tegra: introduce plat_enable_console() by Varun Wadekar · Wed Aug 21 14:01:31 2019 -0700
  28. c9e8f3a Tegra: include: drivers: introduce spe.h by Varun Wadekar · Wed Aug 21 13:47:58 2019 -0700
  29. 2a6559a Tegra194: update nvg header to v6.4 by Steven Kao · Wed Nov 08 11:33:56 2017 +0800
  30. 4e7a63c Tegra194: mce: enable strict checking by Dilan Lee · Thu Aug 10 16:01:42 2017 +0800
  31. 0723bb6 Tegra194: CC6 state from last offline CPU in the cluster by Varun Wadekar · Mon Oct 16 15:57:17 2017 -0700
  32. 498d501 Tegra194: console driver compilation from platform makefiles by Varun Wadekar · Wed Nov 15 15:52:01 2017 -0800
  33. ee93ed1 Tegra194: memctrl: platform handler for TZDRAM setup by Steven Kao · Tue Nov 14 19:12:58 2017 +0800
  34. 0d42411 Tegra194: memctrl: override SE client as coherent by Puneet Saxena · Fri Sep 08 12:14:03 2017 +0530
  35. da865de Tegra194: save system suspend entry marker to TZDRAM by Varun Wadekar · Fri Nov 10 13:27:29 2017 -0800
  36. e0c222f Tegra194: helper functions for CPU rst handler and SMMU ctx offset by Varun Wadekar · Fri Nov 10 13:23:34 2017 -0800
  37. 362a6b2 Tegra194: cleanup references to Tegra186 by Varun Wadekar · Fri Nov 10 11:04:42 2017 -0800
  38. 093bfaa Tegra194: mce: display NVG header version during boot by Varun Wadekar · Tue Nov 07 08:50:55 2017 -0800
  39. 706b9fe Tegra194: mce: fix cg_cstate encoding format by Vignesh Radhakrishnan · Sat Nov 04 16:36:23 2017 -0700
  40. 530b217 Tegra194: drivers: SE and RNG1/PKA1 context save support by Steven Kao · Fri Jun 23 16:18:58 2017 +0800
  41. 4607f17 Tegra194: rename secure scratch register macros by Steven Kao · Mon Oct 23 18:35:14 2017 +0800
  42. acdf411 Tegra194: SiP: Fix Rule 8.4 and Rule 10.4 violation by Anthony Zhou · Wed Oct 25 18:17:08 2017 +0800
  43. 7aa6c03 Tegra194: mce: remove unsupported functionality by Varun Wadekar · Thu Oct 19 12:02:17 2017 -0700
  44. a4e0a81 Tegra194: sanity check target cluster during core power on by Varun Wadekar · Tue Oct 17 10:53:33 2017 -0700
  45. 8bf6d4e Tegra194: fix defects flagged by MISRA scan by Anthony Zhou · Wed Sep 20 17:44:43 2017 +0800
  46. c46150f Tegra194: mce: fix defects flagged by MISRA scan by Anthony Zhou · Wed Sep 20 17:18:56 2017 +0800
  47. 1719707 Tegra194: remove the GPU reset register macro by Steven Kao · Fri Oct 13 10:28:29 2017 +0800
  48. 4309d7b Tegra194: MC registers to allow CPU accesses to TZRAM by Varun Wadekar · Tue Oct 03 15:25:44 2017 -0700
  49. 58d1194 Tegra194: increase MAX_MMAP_REGIONS macro value by Steven Kao · Fri Sep 29 16:32:34 2017 +0800
  50. 6f373a2 Tegra194: update nvg header to v6.1 by Steven Kao · Fri Sep 29 18:09:17 2017 +0800
  51. 238d6d2 Tegra194: update cache operations supported by the ROC by Steven Kao · Wed Aug 16 20:12:00 2017 +0800
  52. 128f46a Tegra194: memctrl: platform handlers to reprogram MSS by Varun Wadekar · Thu Oct 24 16:06:12 2019 -0700
  53. a07d1c7 Tegra194: core and cluster count values by Varun Wadekar · Wed Aug 23 14:59:09 2017 -0700
  54. 86d3a2b Tegra194: correct the TEGRA_CAR_RESET_BASE macro value by Steven Kao · Thu Aug 31 13:35:01 2017 +0800
  55. 53fc032 Tegra194: add MC_SECURITY mask defines by Harvey Hsieh · Wed Aug 09 16:26:33 2017 +0800
  56. 74813f9 Tegra194: Update wake mask, wake time for cpu offlining by Krishna Sitaraman · Fri Jul 14 13:51:44 2017 -0700
  57. 8162109 Tegra194: program stream ids for XUSB by Ajay Gupta · Tue Aug 01 15:53:04 2017 -0700
  58. 09f6817 Tegra194: Update checks for c-state stats by Krishna Sitaraman · Wed May 24 17:21:22 2017 -0700
  59. fe9635b Tegra194: smmu: fix mask for board revision id by Pritesh Raithatha · Thu Aug 03 19:12:14 2017 +0530
  60. 7dfbca7 Tegra194: smmu: ISO support by Steven Kao · Tue Jul 25 12:44:32 2017 +0800
  61. 978887f Tegra194: Initialize smmu on system suspend exit by Vignesh Radhakrishnan · Tue Jul 11 15:16:08 2017 -0700
  62. 832ad79 Tegra194: Update cpu core-id calculation by Krishna Sitaraman · Fri Jun 30 13:51:12 2017 -0700
  63. 4035902 Tegra194: read-modify-write ACTLR_ELx registers by Steven Kao · Thu Jun 22 12:54:06 2017 +0800
  64. d7a5c25 Tegra194: Enable fake system suspend by Vignesh Radhakrishnan · Thu May 25 16:27:42 2017 -0700
  65. f8b4b49 Tegra194: convert 'target_cpu' and 'target_cluster' to 32-bits by Varun Wadekar · Thu Jun 22 10:35:38 2017 -0700
  66. 0075990 Tegra194: platform support for memctrl/smmu drivers by Varun Wadekar · Wed May 31 11:41:00 2017 -0700
  67. c64afeb Tegra194: Support for cpu suspend by Krishna Sitaraman · Mon Jan 23 16:15:44 2017 -0800
  68. 5ae876f intel: Refactor common platform code [5/5] by Hadi Asyrafi · Wed Oct 23 17:58:06 2019 +0800
  69. 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · Wed Oct 23 17:35:32 2019 +0800
  70. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · Wed Oct 23 18:34:14 2019 +0800
  71. f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · Wed Oct 23 17:02:55 2019 +0800
  72. 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · Wed Oct 23 16:26:53 2019 +0800
  73. 91e299c rockchip: px30: Add support for UART3 as serial output by Paul Kocialkowski · Wed Nov 27 14:59:36 2019 +0100
  74. 978b746 plat/st: Fix incorrect return value by Lionel Debieve · Mon Nov 18 15:52:13 2019 +0100
  75. 3d9617a allwinner: power: Add DLDO4 power rail by Stefan Mavrodiev · Tue Nov 26 09:29:04 2019 +0200
  76. ab5d485 Merge changes I5693ad56,I9ddc077a into integration by Soby Mathew · Mon Nov 25 12:54:21 2019 +0000
  77. 181aa84 mediatek: mt8183: Fix AARCH64 init fail on CPU0 by developer · Thu Oct 31 14:19:44 2019 +0800
  78. e2f1332 mediatek: mt8183: refine GIC driver for low power scenarios by developer · Fri Oct 04 10:47:11 2019 +0800
  79. b4cb7f0 Merge "mediatek: mt8183: switch PLL/CLKSQ/ck_off/axi_26m control to SPM" into integration by joanna.farley · Fri Nov 22 12:25:55 2019 +0000
  80. 469db44 Merge "Fix multithreaded FVP power domain tree" into integration by Alexei Fedorov · Wed Nov 20 10:42:47 2019 +0000
  81. 42d18ca Enable -Wlogical-op always by Justin Chadwell · Wed Sep 18 14:13:42 2019 +0100
  82. 7d0e3ba Enable -Wshadow always by Justin Chadwell · Tue Sep 17 15:21:50 2019 +0100
  83. 0ac3941 GIC-600: Fix include ordering according to the coding style by Max Shvetsov · Tue Nov 19 11:01:26 2019 +0000
  84. cdd6393 Merge changes from topic "tegra-downstream-092319" into integration by Sandrine Bailleux · Tue Nov 19 08:05:08 2019 +0000
  85. 130f438 Merge changes from topic "lm/improve_memory_layout" into integration by Sandrine Bailleux · Mon Nov 18 16:45:03 2019 +0000
  86. 438aa72 ROMLIB: Optimize memory layout when ROMLIB is used by Louis Mayencourt · Fri Oct 11 14:31:13 2019 +0100
  87. 75afb1d plat/rockchip: initialize reset and poweroff GPIOs with known invalid value by Vasily Khoruzhick · Fri Nov 15 08:25:02 2019 -0800
  88. 27c671a Fix multithreaded FVP power domain tree by Imre Kis · Fri Nov 15 09:50:06 2019 +0000
  89. 88bcd5a Tegra194: remove L2 ECC parity protection setting by Harvey Hsieh · Wed Nov 23 19:15:02 2016 +0800
  90. 5c5f78c Tegra194: sip_calls: mark unused parameter as const by Varun Wadekar · Fri Apr 28 18:15:09 2017 -0700
  91. a7265be Tegra194: implement handler to retrieve power domain tree by Varun Wadekar · Fri Apr 28 08:45:53 2017 -0700
  92. 5e890b3 Tegra194: mce: fix function declaration conflicts by Anthony Zhou · Fri Apr 28 13:52:58 2017 +0800
  93. f2d5466 Tegra194: add macros to read GPU reset status by Varun Wadekar · Wed Apr 26 08:57:27 2017 -0700
  94. 0e2502f Tegra194: skip notifying MCE in fake system suspend by Vignesh Radhakrishnan · Mon Apr 10 15:07:39 2017 -0700
  95. 153ba22 Tegra194: Enable system suspend by Tejal Kudav · Tue Feb 14 18:02:04 2017 -0800
  96. b6b7fd1 Merge changes from topic "tegra-downstream-092319" into integration by Sandrine Bailleux · Wed Nov 13 16:31:22 2019 +0000
  97. a14d6a5 Merge "plat/arm: Re-enable PIE when RESET_TO_BL31=1" into integration by Paul Beesley · Tue Nov 12 17:00:13 2019 +0000
  98. 2c44a44 n1sdp: setup multichip gic routing table by Manish Pandey · Mon Oct 14 17:37:38 2019 +0100
  99. 2207e93 plat/arm: Re-enable PIE when RESET_TO_BL31=1 by Manish Pandey · Wed Nov 06 13:17:46 2019 +0000
  100. 28adb06 mediatek: mt8183: switch PLL/CLKSQ/ck_off/axi_26m control to SPM by developer · Mon Oct 28 21:11:48 2019 +0800