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git01.mediatek.com / filogic / atf / 41b1194bcb1658edbaf66468188856babe986e99 / include / arch / aarch32 / arch.h
  1. 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 20 15:22:44 2019 +0100
  2. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · Tue Jul 23 11:12:41 2019 +0100
  3. 007d745 arch: add some defines for generic timer registers by Yann Gautier · Wed Apr 17 13:47:07 2019 +0200
  4. f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · Thu Feb 21 14:16:24 2019 +0000
  5. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · Mon Feb 18 16:55:43 2019 +0000
  6. d29d21e drivers: generic_delay_timer: Assert presence of Generic Timer by Antonio Nino Diaz · Wed Feb 06 09:23:04 2019 +0000
  7. c326c34 xlat v2: Dynamically detect need for CnP bit by Antonio Nino Diaz · Fri Jan 11 11:20:10 2019 +0000
  8. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  9. 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · Mon Dec 17 17:20:57 2018 +0000[Renamed from include/lib/aarch32/arch.h]
  10. 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · Fri Jan 04 09:14:22 2019 +0000