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git01.mediatek.com / filogic / atf / 409b3826e2ffccaf3464f74654f7c36c1fface79 / plat / rockchip / rk3399 / drivers / pmu / pmu.h
  1. 17d7d9b plat/rockchip: enable power domains of rk3399 before reset by Piotr Szczepanik · Tue Dec 10 20:55:00 2019 +0000
  2. 65d5267 plat/rockchip: Switch to use new common BL aux parameter library by Julius Werner · Fri May 24 20:37:58 2019 -0700
  3. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  4. 4ab3a96 rockchip/rk3399: Change PD_CTR_LOOP to 10000 by Derek Basehore · Tue Jan 23 15:44:31 2018 -0800
  5. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  6. b4bcc1d rockchip: Clean up header and referenced files by Xing Zheng · Fri Feb 24 16:26:11 2017 +0800
  7. 5339d18 rockchip: close the PD center logic during suspend by Caesar Wang · Thu Oct 27 01:13:34 2016 +0800
  8. 0620bb8 rockchip: move pmu registers into another header for rk3399 by Caesar Wang · Thu Oct 27 01:10:28 2016 +0800
  9. 5045a1c rockchip: set gpio2 ~ gpio4 to input and pull none mode by Caesar Wang · Sat Sep 10 02:47:53 2016 +0800
  10. 3e8548b rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock by Caesar Wang · Thu Aug 25 06:31:32 2016 +0800
  11. ed6b9a5 rockchip: update to handle PWMs for rk3399 by Caesar Wang · Thu Aug 11 02:11:45 2016 +0800
  12. ad39cfe rockchip: fixes typo and some bugs for suspend/resume tests by Caesar Wang · Thu Jul 21 10:36:22 2016 +0800
  13. 42e113e rockchip: support the suspend/resume for rk3399 by Tony Xie · Sat Jul 16 11:16:51 2016 +0800
  14. d1b9d2d rockchip: support system off function for rk3399 by Caesar Wang · Wed May 25 19:05:19 2016 +0800
  15. 59e41b5 rockchip: support the suspend/resume for rk3399 by Caesar Wang · Sun Apr 10 14:11:07 2016 +0800
  16. f6118cc Support for Rockchip's family SoCs by Tony Xie · Fri Jan 15 17:17:32 2016 +0800