Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / 3acb2b054c0d963460d6fa98949334207d3c9481 / plat / nvidia / tegra / soc / t210 / platform_t210.mk
  1. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · 9 years ago
  2. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · 9 years ago
  3. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · 9 years ago
  4. 97f2490 Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform by Varun Wadekar · 9 years ago
  5. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · 9 years ago
  6. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · 9 years ago
  7. 4e9c231 Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · 9 years ago
  8. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · 9 years ago
  9. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 9 years ago
  10. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 9 years ago