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git01.mediatek.com / filogic / atf / 39b4221896eb1da3ee209fb79272e2ed10a4aaeb / plat / rockchip / common / pmusram
  1. 1f8fdeb rockchip/rk3399: set ddr clock source back to dpll when ddr resume by Lin Huang · 8 years ago
  2. 2a6df22 rockchip: check wakeup cpu when resume by Lin Huang · 8 years ago
  3. 88dd123 rockchip/rk3399: enable PMU_PERILP_PD_EN bit when suspend by Lin Huang · 8 years ago
  4. 30e4339 rockchip: add pmusram section by Lin Huang · 8 years ago
  5. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  6. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · 8 years ago
  7. 493bf33 Fix incorrect copyright notices by Antonio Nino Diaz · 8 years ago
  8. d90f43e rockchip: optimize the link mechanism for SRAM code by Caesar Wang · 8 years ago
  9. fbaa360 rockchip: fix the power up/dowm cnt for rk3399 by Caesar Wang · 8 years ago
  10. ad39cfe rockchip: fixes typo and some bugs for suspend/resume tests by Caesar Wang · 8 years ago
  11. 59e41b5 rockchip: support the suspend/resume for rk3399 by Caesar Wang · 9 years ago
  12. f6118cc Support for Rockchip's family SoCs by Tony Xie · 9 years ago