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filogic
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3466d68d9e56df6f5fee7e83c5b9d740a878d020
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docs
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plat
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xilinx-versal.rst
9156ffd
xilinx: versal: PLM to ATF handover
by Venkatesh Yadav Abbarapu
· 4 years, 10 months ago
cbc9005
plat: xilinx: versal: Make silicon default build target
by Siva Durga Prasad Paladugu
· 5 years ago
f3653a6
doc: Reformat platform port documents
by Paul Beesley
· 5 years ago
[Renamed (90%) from docs/plat/xilinx-versal.md]
fe4af66
arm64: versal: Add support for new Xilinx Versal ACAPs
by Siva Durga Prasad Paladugu
· 6 years ago