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filogic
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atf
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32d340b77fec03d3e4a6a91bc49debffb0c3c507
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lib
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cpus
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aarch32
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cortex_a57.S
b1335b7
refactor(cpus): add Cortex-A57 errata framework information
by Boyan Karatotev
· 1 year, 7 months ago
7550aa2
fix(security): report CVE 2022 23960 missing for aarch32 A57 and A72
by John Powell
· 2 years, 4 months ago
aa2c029
Cortex-A57: Implement workaround for erratum 817169
by Ambroise Vincent
· 5 years ago
1b0db76
Cortex-A57: Implement workaround for erratum 814670
by Ambroise Vincent
· 5 years ago
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· 6 years ago
4a284a4
aarch32: Implement static workaround for CVE-2018-3639
by Dimitris Papastamos
· 6 years ago
8ca0af2
Workaround for CVE-2017-5715 for Cortex A9, A15 and A17
by Dimitris Papastamos
· 7 years ago
41b0094
Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS
by Matt Ma
· 7 years ago
0c9bd27
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· 7 years ago
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· 7 years ago
2b40ca6
aarch32: Implement errata workarounds for Cortex A57
by Dimitris Papastamos
· 7 years ago
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 7 years ago
a9f776c
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
by Yatharth Kochar
· 8 years ago