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git01.mediatek.com / filogic / atf / 326f29522d05bc18f8f7db24c678ec10edec6576 / plat / nvidia / tegra / common
  1. 9c24a55 Tegra: memctrl_v2: fix logic to calculate TZRAM_ADDR_HI bits by Varun Wadekar · 9 years ago
  2. d97f9cf Merge pull request #873 from dp-arm/dp/makefile-reorg by davidcunado-arm · 8 years ago
  3. 7058aee Tegra: memctrl_v2: program Video Memory carveout size in MBs by Varun Wadekar · 9 years ago
  4. 0012d05 Tegra: memctrl_v2: no stream ID override for Security Engine by Varun Wadekar · 9 years ago
  5. e2bc7f2 Tegra186: enable support for simulation environment by Varun Wadekar · 9 years ago
  6. 9610573 Tegra: memctrl_v2: enable APE overrides for chip verification by Varun Wadekar · 9 years ago
  7. a0f2697 Tegra186: re-configure MSS' client settings by Varun Wadekar · 9 years ago
  8. 87e44ff Tegra186: memctrl_v2: restore video memory settings by Varun Wadekar · 9 years ago
  9. 2bb9f47 Tegra: replace ASM signed tests with unsigned by Douglas Raillard · 8 years ago
  10. 6c5b98f Tegra: memctrl_v2: set NO_OVERRIDE for APE clients by Varun Wadekar · 9 years ago
  11. c9ac3e4 Tegra: memctrl_v2: implement MC txn override WAR by Varun Wadekar · 9 years ago
  12. e60f1bf Tegra: memctrl_v2: check GPU state before VPR programming by Varun Wadekar · 9 years ago
  13. de729d6 Tegra: memctrl_v2: no SID override for SCE block by Varun Wadekar · 9 years ago
  14. 13e7dc4 Tegra: memctrl_v2: secure the on-chip TZSRAM memory by Varun Wadekar · 9 years ago
  15. cd5a2f5 Tegra: memctrl_v2: Memory Controller Driver (v2) by Varun Wadekar · 9 years ago
  16. fc9b91e Tegra: public interfaces to get the chip's major/minor versions by Varun Wadekar · 8 years ago
  17. 230011c Move plat/common source file definitions to generic Makefiles by dp-arm · 8 years ago
  18. 3fb854f Tegra: enable SEPARATE_CODE_AND_RODATA build flag by Varun Wadekar · 8 years ago
  19. e0f3dfd Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · 8 years ago
  20. 777baa5 Tegra: init the console only if the platform supports it by Damon Duan · 8 years ago
  21. 14eaede Tegra: calculate proper power state for affinity levels by Varun Wadekar · 8 years ago
  22. a2c6be6 Tegra: uninit and re-init console across System Suspend by Varun Wadekar · 8 years ago
  23. 28dcc21 Tegra: support for silicon/simulation platforms by Varun Wadekar · 8 years ago
  24. f2aa1be Tegra: per-soc `get_target_pwr_state` handler by Varun Wadekar · 8 years ago
  25. b41a414 Tegra: relocate BL32 image to TZDRAM memory by Varun Wadekar · 8 years ago
  26. d22d4ad Tegra: get BL31 arguments from previous bootloader by Varun Wadekar · 8 years ago
  27. 197a75f Tegra: return BL32 entry point info if it is valid by Varun Wadekar · 8 years ago
  28. 5118b53 Tegra: configure TZDRAM fence during early setup by Varun Wadekar · 8 years ago
  29. d5f578a Tegra: restore TZRAM settings on "System Resume" by Varun Wadekar · 8 years ago
  30. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · 8 years ago
  31. c6c386d Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 by Varun Wadekar · 8 years ago
  32. dc79930 Tegra: implement FIQ interrupt handler by Varun Wadekar · 9 years ago
  33. b7b4575 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · 9 years ago
  34. 2497539 Tegra: implement common handler `plat_get_target_pwr_state()` by Varun Wadekar · 8 years ago
  35. 25e658e Tegra: include platform_def.h to access UART macros by Varun Wadekar · 9 years ago
  36. 2330edd Tegra: allow SiP smc calls from Secure World by Wayne Lin · 9 years ago
  37. 3f0a8ad Tegra: handler for per-soc early setup by Varun Wadekar · 9 years ago
  38. 1ec441e Tegra: relocate code to BL31_BASE during cold boot by Varun Wadekar · 9 years ago
  39. d22429d Tegra: implement pwr_domain_pwr_down_wfi() handler by Varun Wadekar · 9 years ago
  40. d151363 Tegra: memmap BL31's TZDRAM carveout by Varun Wadekar · 9 years ago
  41. 6eec6d6 Tegra: allow individual SoCs to restore their settings by Varun Wadekar · 9 years ago
  42. 6077dce Tegra: enable PSCI extended state ID processing by Varun Wadekar · 9 years ago
  43. 0dc9181 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · 9 years ago
  44. 1dcffa9 Tegra: enable runtime console by Varun Wadekar · 9 years ago
  45. e5caeed Tegra: PM: soc-specific system off handler by Varun Wadekar · 9 years ago
  46. 923d04a Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · 9 years ago
  47. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · 9 years ago
  48. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · 9 years ago
  49. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · 9 years ago
  50. baf903e Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · 9 years ago
  51. 39f87d1 Tegra: use ClusterId for calculating core position by Varun Wadekar · 9 years ago
  52. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · 9 years ago
  53. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · 9 years ago
  54. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · 9 years ago
  55. a8954fc Replace some memset call by zeromem by Douglas Raillard · 8 years ago
  56. 21362a9 Introduce unified API to zero memory by Douglas Raillard · 8 years ago
  57. 0fac5af Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · 8 years ago
  58. 1723113 Migrate platform makefile to new console driver location by Soby Mathew · 8 years ago
  59. f6c4108 Include `plat_psci_common.c` from the new location by Soby Mathew · 9 years ago
  60. cc037c1 Migrate platform ports to the new xlat_tables library by Soby Mathew · 9 years ago
  61. e7ae6db Disable PL011 UART before configuring it by Juan Castillo · 9 years ago
  62. a78bb1b Tegra: remove support for legacy platform APIs by Varun Wadekar · 9 years ago
  63. b2baa89 Tegra: flowctrl: rename tegra_fc_cpu_idle() to tegra_fc_cpu_powerdn() by Varun Wadekar · 9 years ago
  64. 8b82fae Tegra: introduce per-soc system reset handler by Varun Wadekar · 9 years ago
  65. 4489ad1 Tegra: Perform cache maintenance on video carveout memory by Vikram Kanigiri · 9 years ago
  66. 1be2f97 Tegra: fix logic to clear videomem regions by Varun Wadekar · 9 years ago
  67. 4e9c231 Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · 9 years ago
  68. e1eaf8e Tegra: memmap the actual memory available for BL31 by Varun Wadekar · 9 years ago
  69. c8bfe2e Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · 9 years ago
  70. 0f3baa0 Tegra: Support for Tegra's T132 platforms by Varun Wadekar · 9 years ago
  71. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · 9 years ago
  72. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · 9 years ago
  73. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 9 years ago
  74. 30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · 9 years ago
  75. fccf8e0 Tegra: PMC: check if a CPU is already online by Varun Wadekar · 9 years ago
  76. 85a90cf Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · 9 years ago
  77. bc74fec Tegra: introduce delay timer support by Varun Wadekar · 9 years ago
  78. 207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · 9 years ago
  79. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · 9 years ago
  80. d3a4150 Add missing features to the Tegra GIC driver by Varun Wadekar · 9 years ago
  81. f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · 9 years ago
  82. 7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · 9 years ago
  83. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · 9 years ago
  84. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 9 years ago