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git01.mediatek.com / filogic / atf / 313c5581bb99fe21d0ae04492fe82cb9e5c4bf39 / include / drivers / st / stm32mp1_ddr_regs.h
  1. 8ce825f refactor(st-ddr): reorganize generic and specific elements by Nicolas Le Bayon · Tue May 18 10:01:30 2021 +0200
  2. 6d8c244 feat(stm32mp1): allow configuration of DDR AXI ports number by Yann Gautier · Thu Sep 17 12:42:46 2020 +0200
  3. e22424a feat(st-ddr): add read valid training support by Nicolas Le Bayon · Fri Sep 10 12:03:38 2021 +0200
  4. 3caba8f ddr: stm32mp1_ddr: correct SELFREF_TO_X32 mask by Yann Gautier · Mon Feb 01 11:14:06 2021 +0100
  5. 1a3fc9f drivers: st: update drivers code by Yann Gautier · Thu Jan 17 14:35:22 2019 +0100
  6. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  7. 79fb7b9 stm32mp1: remove duplicate function declaration by Yann Gautier · Fri Nov 09 17:47:34 2018 +0100
  8. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  9. caf575b stm32mp1: Add DDR support and its security with TZC400 by Yann Gautier · Tue Jul 24 17:18:19 2018 +0200