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git01.mediatek.com / filogic / atf / 30e43399acf713e1b047014298969d3f88af67f4 / plat / rockchip / rk3399 / drivers / dram / dfs.c
  1. e22d31a rockchip/rk3399: fix DRAM gate training issue by Lin Huang · 8 years ago
  2. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  3. 509f379 rockchip/rk3399: changed printf/tf_printf for console output by Caesar Wang · 8 years ago
  4. be2a895 rockchip: rk3399: Use tFC value instead of tRFC value by Derek Basehore · 8 years ago
  5. b07dfeb rockchip: rk3399: Fix CAS latency setting by Derek Basehore · 8 years ago
  6. 035d6d6 rockchip: rk3399: disable training modules after DDR DFS by Xing Zheng · 8 years ago
  7. 397046c rockchip: rk3399: Move DQS drive strength setting to M0 by Derek Basehore · 8 years ago
  8. b734ba5 rockchip: rk3399: Remove dram dfs optimization by Derek Basehore · 8 years ago
  9. b4a7676 rockchip: rk3399: improve the m0 enable flow by Lin Huang · 8 years ago
  10. 52512c2 rockchip: rk3399: dram: set all ddr frequency pll_postdiv values to 0 by Lin Huang · 8 years ago
  11. dc8e82e rockchip: rk3399: enable CA training when do ddr dfs by Lin Huang · 8 years ago
  12. 0e8909d rockchip: rk3399: Enable per CS training at 666MHz by Derek Basehore · 8 years ago
  13. e13bc54 rockchip: rk3399: add support for ddrfreq suspend/resume by Derek Basehore · 8 years ago
  14. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · 8 years ago
  15. b106512 rk3399: dram: making phy into dll bypass mode at low frequency by Derek Basehore · 8 years ago
  16. ff461d0 rockchip: rk3399: dram: remove dram_init and dts_timing_receive function by Derek Basehore · 8 years ago
  17. 8bc1667 rockchip: Change dmc register accesses to ATF style for rk3399 by Caesar Wang · 8 years ago
  18. a845690 rockchip: Break out common dram code for rk3399 by Caesar Wang · 8 years ago