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filogic
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atf
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30275dc6164124de1245e23bb04105a37b450208
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lib
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cpus
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aarch64
b5a6304
Fix the Cortex-A57 reset handler register usage
by Soby Mathew
· Thu Jan 29 12:00:58 2015 +0000
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· Thu Nov 20 18:09:41 2014 +0000
7d861ea
Invalidate the dcache after initializing cpu-ops
by Soby Mathew
· Tue Nov 18 10:14:14 2014 +0000
937488b
Optimize Cortex-A57 cluster power down sequence on Juno
by Soby Mathew
· Mon Sep 22 14:13:34 2014 +0100
1604fa0
Optimize barrier usage during Cortex-A57 power down
by Soby Mathew
· Mon Sep 22 12:15:26 2014 +0100
c088433
Apply errata workarounds only when major/minor revisions match.
by Soby Mathew
· Mon Sep 22 12:11:36 2014 +0100
42aa5eb
Add support for level specific cache maintenance operations
by Soby Mathew
· Tue Sep 02 10:47:33 2014 +0100
802f865
Add support for selected Cortex-A57 errata workarounds
by Soby Mathew
· Thu Aug 14 16:19:29 2014 +0100
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· Thu Aug 14 13:36:41 2014 +0100
8e2f287
Add CPU specific power management operations
by Soby Mathew
· Thu Aug 14 12:49:05 2014 +0100
f1785fd
Add platform API for reset handling
by Soby Mathew
· Thu Aug 14 12:22:32 2014 +0100
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· Thu Aug 14 11:33:56 2014 +0100