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git01.mediatek.com / filogic / atf / 2ee679791d88a5f4346e16f4b23a2ea0dc7fdd62 / drivers
  1. 5fc61a6 fix(drivers/tzc400): never disable filter 0 by Stas Sergeev · Thu Apr 29 22:32:10 2021 +0300
  2. 46dff79 Merge changes from topic "gic-700-auto" into integration by André Przywara · Fri Sep 10 17:17:46 2021 +0200
  3. a56367b Merge "feat(tzc400): update filters by region" into integration by Mark Dykes · Thu Sep 09 17:49:06 2021 +0200
  4. d09845c Merge "fix(drivers/marvell/comphy): fix name of 3.125G SerDes mode" into integration by Madhukar Pappireddy · Thu Sep 09 00:32:08 2021 +0200
  5. 7bd2336 feat(tzc400): update filters by region by Lionel Debieve · Sun Sep 27 20:48:30 2020 +0200
  6. b21886a Merge "feat(gic600ae): introduce support for Fault Management Unit" into integration by Joanna Farley · Mon Sep 06 21:00:56 2021 +0200
  7. eea6dc1 feat(gic600ae): introduce support for Fault Management Unit by Varun Wadekar · Tue May 04 16:14:09 2021 -0700
  8. f70f4b9 feat(gicv3): detect GICv4 feature at runtime by Andre Przywara · Tue May 18 15:51:06 2021 +0100
  9. 9e1dc68 feat(gicv3): multichip: detect GIC-700 at runtime by Andre Przywara · Tue May 18 15:46:58 2021 +0100
  10. daf89a7 refactor(gic): move GIC IIDR numbers by Andre Przywara · Tue Aug 24 10:02:52 2021 +0100
  11. 51974d2 fix(drivers/marvell/comphy): fix name of 3.125G SerDes mode by Pali Rohár · Fri Aug 27 11:16:43 2021 +0200
  12. b27ac80 refactor(plat/nxp): refine api to read SVR register by Jiafei Pan · Tue Jul 20 17:14:32 2021 +0800
  13. b6c24ce refactor(gicv3): rename GIC Clayton to GIC-700 by Andre Przywara · Tue Jul 20 19:20:07 2021 +0100
  14. b2d04d0 Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration by Joanna Farley · Fri Aug 13 10:16:20 2021 +0200
  15. ff99a77 Merge changes from topic "st_fip_fconf" into integration by Manish Pandey · Fri Aug 13 00:22:55 2021 +0200
  16. 7834b46 refactor: moved drivers hdr files to include/drivers/nxp by Pankaj Gupta · Thu Mar 25 15:15:52 2021 +0530
  17. a26bf35 refactor(hw_crc32): renamed hw_crc32 to tf_crc32 by Manish V Badarkhe · Fri Jul 02 20:29:56 2021 +0100
  18. 04005b7 feat(fwu): avoid NV counter upgrade in trial run state by Manish V Badarkhe · Sun Jun 20 22:29:22 2021 +0100
  19. 7ef036f feat(fwu): add FWU driver by Manish V Badarkhe · Sun Jun 20 20:35:25 2021 +0100
  20. 6933a59 Merge "fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif" into integration by Manish Pandey · Wed Jul 28 11:29:32 2021 +0200
  21. 94e1976 fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif by Ming Huang · Fri Jun 04 16:23:22 2021 +0800
  22. 1d4a383 fix(drivers/scmi-msg): entry: add weak functions by Peng Fan · Fri Jun 11 11:16:08 2021 +0800
  23. a662df5 feat(drivers/scmi-msg): add power domain protocol by Peng Fan · Wed Jun 09 20:35:49 2021 +0800
  24. 9b9665d fix(drivers/scmi-msg): smt: fix build for aarch64 by Peng Fan · Wed Jun 09 20:33:43 2021 +0800
  25. 02a4807 feat(io_mtd): offset management for FIP usage by Lionel Debieve · Fri Jul 17 12:35:30 2020 +0200
  26. 0970414 feat(nand): count bad blocks before a given offset by Yann Gautier · Wed Aug 05 14:39:00 2020 +0200
  27. debafb8 feat(plat/rcar3): add new board revision for Salvator-XS/H3ULCB by Toshiyuki Ogasahara · Mon Nov 30 14:52:19 2020 +0900
  28. 62e19ac feat(drivers/rcar3): ddr: add function to judge a DDR rank by Toshiyuki Ogasahara · Tue Dec 08 16:14:56 2020 +0900
  29. 750b5c9 fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N by Chiaki Fujii · Fri Oct 30 10:45:18 2020 +0900
  30. 6552f64 fix(drivers/rcar3): i2c_dvfs: fix I2C operation by Toshiyuki Ogasahara · Mon Nov 30 20:42:27 2020 +0900
  31. 7762658 fix(drivers/rcar3): fix CPG registers redefinition by Toshiyuki Ogasahara · Mon Nov 30 20:39:21 2020 +0900
  32. 594919f fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition by Toshiyuki Ogasahara · Mon Nov 30 20:36:09 2020 +0900
  33. 74b8e17 refactor(measured boot): revisit error handling (3/3) by Sandrine Bailleux · Wed Jun 23 15:44:18 2021 +0200
  34. 9ebe81e refactor(measured boot): revisit error handling (2/3) by Sandrine Bailleux · Wed Jun 23 15:43:02 2021 +0200
  35. 7225e62 refactor(measured boot): revisit error handling (1/3) by Sandrine Bailleux · Wed Jun 23 15:15:19 2021 +0200
  36. be76143 style(measured boot): fix incorrect indentation by Sandrine Bailleux · Wed Jun 23 10:40:08 2021 +0200
  37. 0b2b045 Merge changes from topic "st_fixes" into integration by Mark Dykes · Thu Jul 01 17:23:30 2021 +0200
  38. e80a81d Merge "fix(drivers/mtd): macronix quad enable bit issue" into integration by Mark Dykes · Thu Jul 01 17:21:07 2021 +0200
  39. d28d41b refactor(measured boot): remove weak definition of plat_get_measured_boot_data() by Sandrine Bailleux · Thu Jun 17 17:18:39 2021 +0200
  40. 9fe78b5 Merge "fix(drivers/mtd): fix MISRA issues and logic improvement" into integration by Mark Dykes · Mon Jun 28 22:15:02 2021 +0200
  41. 82a9881 Merge "style(scmi_common): add \n to warning messages" into integration by Mark Dykes · Mon Jun 28 21:59:41 2021 +0200
  42. 9f3dd1a fix(drivers/mtd): macronix quad enable bit issue by Lionel Debieve · Tue Nov 24 11:44:52 2020 +0100
  43. d9ed336 fix(drivers/mtd): fix MISRA issues and logic improvement by Lionel Debieve · Tue Nov 24 11:46:42 2020 +0100
  44. 72ceb35 fix(drivers/st/pmic): missing error check by Nicolas Le Bayon · Tue Mar 10 18:18:45 2020 +0100
  45. 53ee7d3 fix(drivers/st/pmic): initialize i2c_state by Benjamin Gaignard · Mon Feb 24 13:57:40 2020 +0100
  46. 360e0e9 fix(drivers/st/clk): use correct return value by Yann Gautier · Wed Sep 16 16:40:34 2020 +0200
  47. 4d479e2 Merge changes from topic "io_stm32image" into integration by Madhukar Pappireddy · Fri Jun 18 15:40:20 2021 +0200
  48. 79bc7a7 refactor(gicv3): use helper functions to get SPI/ESPI INTID limit by Heyi Guo · Wed Jan 20 19:05:51 2021 +0800
  49. 60ce825 refactor(gicv3): add helper function to get the limit of ESPI INTID by Heyi Guo · Wed Jan 20 18:50:16 2021 +0800
  50. 9e28499 style(scmi_common): add \n to warning messages by Heyi Guo · Tue Jun 08 19:59:53 2021 +0800
  51. 06f85b4 refactor(gicv3): add helper function to get the limit of SPI INTID by Heyi Guo · Wed Jan 20 18:50:16 2021 +0800
  52. 89f465e Merge changes I85a87dc9,If75df769,I55b0c910 into integration by Madhukar Pappireddy · Mon Jun 07 18:21:16 2021 +0200
  53. a1b3ee0 Merge "fix(plat/marvell/armada): select correct pcie reference clock source" into integration by Manish Pandey · Mon Jun 07 15:45:30 2021 +0200
  54. c1f667c fix(io_stm32image): invalidate cache on local buf by Yann Gautier · Mon Nov 09 13:28:47 2020 +0100
  55. f3633d5 refactor(io_stm32image): add header size variable by Yann Gautier · Fri Jun 19 11:38:24 2020 +0200
  56. f3bc8a0 fix(io_stm32image): uninitialized variable warning by Nicolas Le Bayon · Mon Nov 18 17:15:22 2019 +0100
  57. b74313c feat(drivers/st): manage boot part in io_mmc by Vyacheslav Yurkov · Fri Jun 04 10:08:39 2021 +0200
  58. b3d5f34 feat(drivers/mmc): boot partition read support by Vyacheslav Yurkov · Tue Mar 30 08:16:20 2021 +0200
  59. 52c1de5 fix(plat/marvell/a3720/uart): fix UART parent clock rate determination by Pali Rohár · Fri May 14 15:52:11 2021 +0200
  60. 4ad4313 fix(plat/marvell/armada): select correct pcie reference clock source by Guo Yi · Thu Dec 17 22:30:54 2020 +0000
  61. fee856d fix(plat/marvell/a3720/uart): fix configuring UART clock by Pali Rohár · Thu May 13 15:11:06 2021 +0200
  62. 2666c1e fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation by Pali Rohár · Thu May 13 14:53:44 2021 +0200
  63. 5989c56 fix(driver/auth): avoid NV counter upgrade without certificate validation by Manish V Badarkhe · Sun Apr 25 16:32:11 2021 +0100
  64. d69eb52 Merge changes Id7bdbc9b,Ia813e051,I2c437380,I736724cc,I454fb40a, ... into integration by Manish Pandey · Wed Apr 21 17:08:46 2021 +0200
  65. ea64734 renesas: rzg: Add support to identify EK874 RZ/G2E board by Lad Prabhakar · Fri Mar 19 12:14:01 2021 +0000
  66. d66b384 drivers: renesas: common: watchdog: Add support for RZ/G2E by Lad Prabhakar · Fri Mar 19 11:22:18 2021 +0000
  67. 84e942d drivers: renesas: rzg: Add QoS support for RZ/G2E by Lad Prabhakar · Mon Dec 21 11:33:16 2020 +0000
  68. 7b19dff drivers: renesas: rzg: Add PFC support for RZ/G2E by Lad Prabhakar · Tue Dec 29 13:46:48 2020 +0000
  69. 8347284 drivers: renesas: common: Add support for DRAM initialization on RZ/G2E SoC by Lad Prabhakar · Fri Mar 19 10:53:23 2021 +0000
  70. 21d04f0 renesas: rzg: Add support to identify HopeRun HiHope RZ/G2N board by Lad Prabhakar · Fri Mar 19 12:01:00 2021 +0000
  71. 5cf699c drivers: renesas: common: emmc: Select eMMC channel for RZ/G2N SoC by Lad Prabhakar · Thu Mar 18 18:55:49 2021 +0000
  72. 964fcb2 drivers: renesas: rzg: Add QoS support for RZ/G2N by Lad Prabhakar · Thu Mar 18 18:54:15 2021 +0000
  73. b7fc5e2 drivers: renesas: rzg: Add PFC support for RZ/G2N by Lad Prabhakar · Tue Dec 29 13:39:31 2020 +0000
  74. ed2e11d drivers: renesas: common: Add support for DRAM initialization on RZ/G2N SoC by Lad Prabhakar · Mon Apr 19 17:03:56 2021 +0100
  75. e1c0f74 renesas: rzg: Add support to identify HopeRun HiHope RZ/G2H board by Lad Prabhakar · Mon Dec 21 13:51:58 2020 +0000
  76. 7fb7910 drivers: renesas: common: emmc: Select eMMC channel for RZ/G2H SoC by Lad Prabhakar · Mon Dec 21 13:58:29 2020 +0000
  77. ef124a2 drivers: renesas: rzg: Add QoS support for RZ/G2H by Lad Prabhakar · Fri Dec 11 20:06:59 2020 +0000
  78. b3e77d8 drivers: renesas: rzg: Add PFC support for RZ/G2H by Lad Prabhakar · Thu Mar 18 13:07:51 2021 +0000
  79. 9c86f41 drivers: renesas: common: Add support for DRAM initialization on RZ/G2H SoC by Lad Prabhakar · Mon Apr 19 16:59:55 2021 +0100
  80. 9f2b579 drivers: renesas: rzg: Switch using common ddr code by Lad Prabhakar · Wed Mar 10 14:30:20 2021 +0000
  81. 7fda4b0 drivers: renesas: ddr: Move to common by Lad Prabhakar · Tue Mar 09 17:26:38 2021 +0000
  82. 7da6619 Add SiP service to configure Arm Ethos-N NPU by Mikael Olsson · Fri Feb 12 17:30:22 2021 +0100
  83. 2eb9804 drivers/marvell: check if TRNG unit is present by Konstantin Porotchkin · Sun Mar 07 13:48:21 2021 +0200
  84. b0a7430 drivers: marvell: comphy: add rx training on 10G port by Alex Evraev · Wed Jun 24 22:24:56 2020 +0300
  85. 2309961 plat/marvell/armada: allow builds without MSS support by Konstantin Porotchkin · Mon Oct 12 18:13:07 2020 +0300
  86. e573623 drivers: marvell: misc-dfx: extend dfx whitelist by Grzegorz Jaszczyk · Wed Mar 18 18:07:37 2020 +0100
  87. 7d50972 drivers: marvell: add support for secure read/write of dfx register-set by Grzegorz Jaszczyk · Fri Jan 03 09:35:21 2020 +0100
  88. 6a99b19 ddr_phy: use smc calls to access ddr phy registers by Alex Leibovich · Wed Dec 25 09:22:48 2019 +0200
  89. 755f078 drivers: marvell: thermal: use dedicated function for thermal SiPs by Grzegorz Jaszczyk · Thu Jan 02 16:14:13 2020 +0100
  90. a3173d6 drivers: marvell: add thermal sensor driver and expose it via SIP service by Grzegorz Jaszczyk · Wed Dec 18 15:58:27 2019 +0100
  91. 592a479 Merge changes from topic "dcc_console" into integration by Madhukar Pappireddy · Tue Apr 13 21:42:55 2021 +0200
  92. 2adde8b Merge "driver: brcm: add mdio driver" into integration by Madhukar Pappireddy · Mon Apr 12 16:43:48 2021 +0200
  93. e77be52 mmc: remove useless extra semicolons by Yann Gautier · Tue Mar 23 13:30:43 2021 +0100
  94. d8b6b8e Revert "mmc:prevent accessing to the released space in case of wrong usage" by Yann Gautier · Mon Mar 22 14:02:54 2021 +0100
  95. fbeabd3 Merge changes Id2a538c3,Ifa0339e7,I8b09fab8 into integration by Madhukar Pappireddy · Wed Apr 07 18:58:55 2021 +0200
  96. bcc4416b drivers: marvell: comphy-a3700: Set TXDCLK_2X_SEL bit during PCIe initialization by Pali Rohár · Wed Mar 24 17:03:43 2021 +0100
  97. c9ae236 drivers: marvell: comphy-a3700: Set mask parameter for every reg_set call by Pali Rohár · Wed Mar 24 16:40:46 2021 +0100
  98. 741f7d6 drivers: marvell: comphy-a3700: Fix configuring polarity invert bits by Pali Rohár · Wed Mar 24 16:34:45 2021 +0100
  99. f80014d drivers: dcc: Support JTAG DCC console by Venkatesh Yadav Abbarapu · Fri Nov 27 02:58:24 2020 -0700
  100. 1cbc8a0 Merge changes from topic "tzc400_stm32mp" into integration by Sandrine Bailleux · Mon Mar 29 18:20:58 2021 +0200