1. 650e330 hikey: add hikey support by Haojian Zhuang · Wed May 24 09:36:49 2017 +0800
  2. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · Thu May 12 13:43:33 2016 -0700
  3. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · Thu Oct 29 10:37:28 2015 +0530
  4. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · Tue Oct 06 12:49:31 2015 +0530
  5. ac27f4f zynqmp: remove RESET_TO_BL31=1 from build instruction by Masahiro Yamada · Mon Feb 06 17:59:58 2017 +0900
  6. e4862e2 Merge pull request #651 from Xilinx/zynqmp_uart by danh-arm · Mon Jul 04 18:05:15 2016 +0100
  7. 99c0d7b zynqmp: Add option to select between Cadence UARTs by Soren Brinkmann · Fri Jun 10 09:57:14 2016 -0700
  8. bb272b4 Merge pull request #650 from Xilinx/zynqmp-updates by danh-arm · Wed Jun 15 15:57:02 2016 +0100
  9. 52c798e Add support for QEMU virt ARMv8-A target by Jens Wiklander · Mon Dec 07 14:37:10 2015 +0100
  10. ef8f559 zynqmp: FSBL->ATF handover by Michal Simek · Mon Jun 15 14:22:50 2015 +0200
  11. 4a9ca04 zynqmp: Revise memory configuration options by Soren Brinkmann · Thu Apr 14 10:27:00 2016 -0700
  12. 76fcae3 Add support for Xilinx Zynq UltraScale+ MPSOC by Soren Brinkmann · Sun Mar 06 20:16:27 2016 -0800
  13. f3b823a docs: fix the command to compile BL31 on Tegra by Varun Wadekar · Sat Aug 01 11:14:32 2015 +0530
  14. e98a146 Tegra132: set TZDRAM_BASE to 0xF5C00000 by Varun Wadekar · Fri Jul 31 10:15:41 2015 +0530
  15. f5bd697 tlkd: delete 'NEED_BL32' build variable by Varun Wadekar · Fri Jul 24 18:00:33 2015 +0530
  16. 0f3baa0 Tegra: Support for Tegra's T132 platforms by Varun Wadekar · Thu Jul 16 11:36:33 2015 +0530
  17. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · Fri Jul 03 16:31:28 2015 +0530
  18. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · Fri Jun 05 12:57:27 2015 +0530
  19. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · Tue May 19 16:48:04 2015 +0530