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git01.mediatek.com / filogic / atf / 26b858996d5eeb556b6d75233ef701d39388b7f9 / include / lib / aarch64
  1. c5e8978 Fix incorrect pointer conversion in SMC_UUID_RET() by Sandrine Bailleux · Mon Jul 02 13:01:16 2018 +0200
  2. 2de8153 BL31: Introduce jump primitives by Jeenu Viswambharan · Fri Feb 16 11:54:24 2018 +0000
  3. 2d9f795 ARM Platforms: Update CNTFRQ register in CNTCTLBase frame by Soby Mathew · Mon Jun 11 16:21:30 2018 +0100
  4. f00da74 RAS: Add fault injection support by Jeenu Viswambharan · Fri Dec 08 12:13:51 2017 +0000
  5. 19f6cf2 RAS: Add helpers to access Standard Error Records by Jeenu Viswambharan · Thu Dec 07 08:43:05 2017 +0000
  6. 9a7ce2f AArch64: Introduce RAS handling by Jeenu Viswambharan · Wed Apr 04 16:07:11 2018 +0100
  7. 96c7df0 AArch64: Introduce External Abort handling by Jeenu Viswambharan · Thu Nov 30 12:54:15 2017 +0000
  8. 6292d77 arch_helpers: use u_register_t for register read/write by Masahiro Yamada · Fri Feb 02 21:19:17 2018 +0900
  9. e881147 Fix some MISRA defects in SPM code by Antonio Nino Diaz · Tue Apr 17 15:10:18 2018 +0100
  10. 3c817f4 Rename 'smcc' to 'smccc' by Antonio Nino Diaz · Wed Mar 21 10:49:27 2018 +0000
  11. fa2b736 Merge pull request #1197 from dp-arm/dp/amu by davidcunado-arm · Fri Jan 12 09:02:24 2018 +0000
  12. 525c37a AMU: Add configuration helpers for aarch64 by Dimitris Papastamos · Mon Nov 13 09:49:45 2017 +0000
  13. 43e05ec Use PFR0 to identify need for mitigation of CVE-2017-5915 by Dimitris Papastamos · Tue Jan 02 15:53:01 2018 +0000
  14. c52ebdc Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · Mon Dec 18 13:46:21 2017 +0000
  15. ce88eee Enable SVE for Non-secure world by David Cunado · Fri Oct 20 11:30:57 2017 +0100
  16. e08005a AMU: Implement support for aarch64 by Dimitris Papastamos · Thu Oct 12 13:02:29 2017 +0100
  17. 004216b Merge pull request #1163 from antonio-nino-diaz-arm/an/parange by davidcunado-arm · Thu Nov 23 00:39:55 2017 +0000
  18. 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · Fri Oct 13 12:06:06 2017 +0100
  19. b9ef664 Add ARMv8.2 ID_AA64MMFR0_EL1.PARange value by Antonio Nino Diaz · Fri Nov 17 09:52:53 2017 +0000
  20. 1dc771b ARM platforms: Provide SDEI entry point validation by Jeenu Viswambharan · Thu Oct 19 09:15:15 2017 +0100
  21. c41f206 SPM: Introduce Secure Partition Manager by Antonio Nino Diaz · Tue Oct 24 10:07:35 2017 +0100
  22. c444fcf Merge pull request #1130 from jeenu-arm/gic-patches by davidcunado-arm · Sat Oct 21 22:18:48 2017 +0100
  23. 68c415a Merge pull request #1136 from antonio-nino-diaz-arm/an/xlat-get-set-attr by davidcunado-arm · Fri Oct 20 17:17:09 2017 +0100
  24. a0a231d Merge pull request #1129 from robertovargas-arm/enable_O0 by davidcunado-arm · Wed Oct 18 23:39:07 2017 +0100
  25. 4613d5f Introduce functions to disable the MMU in EL1 by Antonio Nino Diaz · Thu Oct 05 15:19:42 2017 +0100
  26. 6250507 GIC: Add API to set priority mask by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  27. ab14e9b GIC: Add API to raise secure SGI by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  28. b1e957e GIC: Add API to get running priority by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  29. c51cdb7 Fix use of MSR (immediate) by Roberto Vargas · Mon Sep 18 09:53:25 2017 +0100
  30. 4168f2f Init and save / restore of PMCR_EL0 / PMCR by David Cunado · Mon Oct 02 17:41:39 2017 +0100
  31. 502ca97 Merge pull request #1105 from antonio-nino-diaz-arm/an/epd1-bit by davidcunado-arm · Mon Sep 25 23:34:28 2017 +0100
  32. f94e40d Fix type of `unsigned long` constants by Antonio Nino Diaz · Thu Sep 14 15:57:44 2017 +0100
  33. c8274a8 Set TCR_EL1.EPD1 bit to 1 by Antonio Nino Diaz · Fri Sep 15 10:30:34 2017 +0100
  34. 02c6307 Helper macro to create MAIR encodings by Isla Mitchell · Fri Jul 21 14:44:36 2017 +0100
  35. c4a1a07 Enable CnP bit for ARMv8.2 CPUs by Isla Mitchell · Mon Aug 07 11:20:13 2017 +0100
  36. ee3457b aarch64: Enable Statistical Profiling Extensions for lower ELs by dp-arm · Tue May 23 09:32:49 2017 +0100
  37. fee8653 Fully initialise essential control registers by David Cunado · Thu Apr 13 22:38:29 2017 +0100
  38. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · Thu May 25 18:04:48 2017 -0700
  39. 6715485 Merge pull request #927 from jeenu-arm/state-switch by davidcunado-arm · Thu May 11 16:04:52 2017 +0100
  40. bc1a929 Introduce ARM SiP service to switch execution state by Jeenu Viswambharan · Thu Feb 16 14:55:15 2017 +0000
  41. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  42. 2a9b882 Add macro to check whether the CPU implements an EL by Jeenu Viswambharan · Tue Feb 21 14:40:44 2017 +0000
  43. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · Sat Apr 29 08:36:12 2017 -0700
  44. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · Mon Apr 10 11:45:52 2017 -0700
  45. ede39cb Changes to support execution in AArch32 state for JUNO by Yatharth Kochar · Mon Nov 14 12:01:04 2016 +0000
  46. b4a7294 Tegra: Add support for fake system suspend by Vignesh Radhakrishnan · Fri Mar 03 10:58:05 2017 -0800
  47. d4acf20 Merge pull request #879 from Summer-ARM/sq/mt-support by davidcunado-arm · Tue Mar 28 18:15:20 2017 +0100
  48. 93c812f ARM platforms: Add support for MT bit in MPIDR by Summer Qin · Tue Feb 28 16:46:17 2017 +0000
  49. c4364f6 Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat by davidcunado-arm · Thu Mar 16 12:42:32 2017 +0000
  50. 3f13c35 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · Fri Feb 24 11:39:22 2017 +0000
  51. ac99803 Add dynamic region support to xlat tables lib v2 by Antonio Nino Diaz · Mon Feb 27 17:23:54 2017 +0000
  52. 700ebe5 spd: trusty: pass VMID via X7 by Anthony Zhou · Sat Oct 31 06:03:41 2015 +0800
  53. 595d0d5 Disable secure self-hosted debug via MDCR_EL3/SDCR by dp-arm · Wed Feb 08 11:51:50 2017 +0000
  54. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · Tue Jan 03 11:01:51 2017 +0000
  55. e40306b Fix declarations of cache maintenance functions by Antonio Nino Diaz · Fri Jan 13 15:03:07 2017 +0000
  56. d1beee2 Add PLAT_xxx_ADDR_SPACE_SIZE definitions by Antonio Nino Diaz · Tue Dec 13 15:28:54 2016 +0000
  57. c14b08e Reset EL2 and EL3 configurable controls by David Cunado · Fri Nov 25 00:21:59 2016 +0000
  58. 5f55e28 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · Mon Oct 31 17:37:34 2016 +0000
  59. a993c42 Unify SCTLR initialization for AArch32 normal world by Soby Mathew · Thu Sep 29 14:15:57 2016 +0100
  60. 550bf5e Support for Mediatek MT6795 SoC by developer · Mon Jul 11 16:05:23 2016 +0800
  61. d48ae61 Automatically select initial xlation lookup level by Antonio Nino Diaz · Tue Aug 02 09:21:41 2016 +0100
  62. a9482df AArch32: Add API to invoke runtime service handler by Soby Mathew · Thu May 05 12:49:09 2016 +0100
  63. c53ac5e Move SIZE_FROM_LOG2_WORDS macro to utils.h by Soby Mathew · Wed Jul 20 14:38:36 2016 +0100
  64. d019487 Introduce PSCI Library Interface by Soby Mathew · Fri Apr 29 19:01:30 2016 +0100
  65. 44170c4 Refactor the xlat_tables library code by Soby Mathew · Tue Mar 22 15:51:08 2016 +0000
  66. 55f9f4b Merge pull request #577 from antonio-nino-diaz-arm/an/remove-xlat-helpers by danh-arm · Fri Apr 01 17:41:10 2016 +0100
  67. 346f1f9 Remove xlat_helpers.c by Antonio Nino Diaz · Thu Mar 31 09:08:56 2016 +0100
  68. 851dc7e Add ISR_EL1 to crash report by Gerald Lejeune · Tue Mar 22 11:11:46 2016 +0100
  69. 6af70f5 Remove DAIF bits handling macros by Gerald Lejeune · Tue Mar 22 11:07:04 2016 +0100
  70. 52b1ba6 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · Tue Mar 01 14:01:03 2016 +0000
  71. 2e86cb1 ARM platforms: rationalise memory attributes of shared memory by Juan Castillo · Wed Jan 13 15:01:09 2016 +0000
  72. 8b0eafe Initialize VTTBR_EL2 when bypassing EL2 by Sandrine Bailleux · Wed Nov 25 17:00:44 2015 +0000
  73. 92712a5 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · Thu Sep 03 14:18:02 2015 +0100
  74. 94efd1f Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · Wed Jul 22 11:53:52 2015 +0100
  75. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  76. 0cdebbd Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · Mon Mar 30 17:15:16 2015 +0100
  77. 2eb68ca Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · Wed Apr 01 11:36:08 2015 +0100
  78. 97625e3 Translate secure/non-secure virtual addresses by Varun Wadekar · Fri Mar 13 14:59:03 2015 +0530
  79. 4e97e54 Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · Thu Feb 26 15:25:58 2015 +0000
  80. 26fb90e Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · Tue Jan 06 21:36:55 2015 +0000
  81. ed99566 Add macros for domain specific barriers. by Soby Mathew · Tue Dec 30 16:11:42 2014 +0000
  82. 30c231b Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · Wed Jan 07 16:36:11 2015 +0000
  83. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · Thu Dec 04 14:14:12 2014 +0000
  84. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · Mon Sep 22 12:11:36 2014 +0100
  85. 070a3e0 Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · Fri Oct 10 12:13:48 2014 +0100
  86. b08bc04 Create BL stage specific translation tables by Soby Mathew · Wed Sep 03 17:48:44 2014 +0100
  87. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · Thu Sep 04 10:23:27 2014 +0200
  88. feddfcf Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · Fri Aug 29 14:41:58 2014 +0100
  89. 798140d Juno: Implement initial platform port by Sandrine Bailleux · Thu Jul 17 16:06:39 2014 +0100
  90. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · Thu Aug 14 16:19:29 2014 +0100
  91. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · Thu Aug 14 13:36:41 2014 +0100
  92. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  93. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100
  94. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  95. e998254 Make enablement of the MMU more flexible by Achin Gupta · Thu Jun 26 08:59:07 2014 +0100
  96. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · Fri Jun 27 16:56:30 2014 -0700
  97. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · Fri Jun 13 17:05:10 2014 +0100
  98. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  99. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · Mon Jun 16 12:41:48 2014 +0100
  100. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · Mon Jun 02 15:44:43 2014 +0100