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git01.mediatek.com / filogic / atf / 259fffe28239dbaae63946ab815b2b349614d6e0 / plat / rockchip / rk3288
  1. 6aba3b1 build(bl32): added check for AARCH32_SP by Juan Pablo Conde · Wed Aug 09 13:19:21 2023 -0500
  2. 2be03c0 fix(tree): correct some typos by Elyes Haouas · Mon Feb 13 09:14:48 2023 +0100
  3. 6892dc3 plat/rockchip: Use common gicv2.mk by Heiko Stuebner · Mon Feb 08 15:44:27 2021 +0100
  4. 73fa2d2 rockchip: Unify Platform specific defines for PSCI module by Deepika Bhavnani · Fri Dec 13 10:48:54 2019 -0600
  5. d6cdea0 rockchip: really use base+size for secure ddr regions by Heiko Stuebner · Wed Oct 09 14:39:44 2019 +0200
  6. 6843ae9 rockchip: Update BL31_BASE to 0x40000 by Kever Yang · Thu Sep 19 10:37:36 2019 +0800
  7. b99b30a rockchip: Fix typo for TF content text by Kever Yang · Fri Sep 20 08:40:54 2019 +0800
  8. f1d230c plat/rockchip: Use new bl31_params_parse_helper() by Julius Werner · Thu May 30 16:57:15 2019 -0700
  9. 65d5267 plat/rockchip: Switch to use new common BL aux parameter library by Julius Werner · Fri May 24 20:37:58 2019 -0700
  10. 05ceda7 rockchip: Disable binary generation for all SoCs. by Christoph Müllner · Wed Apr 24 09:52:54 2019 +0200
  11. 9fecc19 rockchip: Streamline and complete UARTn_BASE macros. by Christoph Müllner · Wed May 01 01:37:58 2019 +0200
  12. 6fd5b94 rockchip: only include libfdt in non-coreboot cases by Heiko Stuebner · Wed Apr 24 20:26:51 2019 +0200
  13. 87b9a3c rockchip: add support for rk3288 by Heiko Stuebner · Thu Mar 14 22:12:04 2019 +0100