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git01.mediatek.com / filogic / atf / 254441d1464d467efff878ea6453eed34ad53fc3 / plat / nvidia
  1. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · 9 years ago
  2. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · 9 years ago
  3. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 9 years ago
  4. 6cab707 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · 9 years ago
  5. 30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · 9 years ago
  6. fccf8e0 Tegra: PMC: check if a CPU is already online by Varun Wadekar · 9 years ago
  7. 071b787 Tegra210: deassert CPU reset signals during power on by Varun Wadekar · 9 years ago
  8. 85a90cf Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · 9 years ago
  9. bc74fec Tegra: introduce delay timer support by Varun Wadekar · 9 years ago
  10. 207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · 9 years ago
  11. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · 9 years ago
  12. d3a4150 Add missing features to the Tegra GIC driver by Varun Wadekar · 9 years ago
  13. f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · 9 years ago
  14. 7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · 9 years ago
  15. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · 9 years ago
  16. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 9 years ago