Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
23d105b2d22bb69442246cb9ed54f2033370556d
/
include
/
arch
/
aarch32
514e59c
Add PIE support for AARCH32
by Yann Gautier
· Mon Oct 05 11:02:54 2020 +0200
e57bce8
Avoid the use of linker *_SIZE__ macros
by Yann Gautier
· Tue Aug 18 14:42:41 2020 +0200
08fec33
arch: Enable `FEAT_SB` for supported non-Armv8.5-A platforms
by Chris Kay
· Tue Mar 09 13:34:35 2021 +0000
fa59c6f
Enable v8.6 AMU enhancements (FEAT_AMUv1p1)
by johpow01
· Fri Oct 02 13:41:11 2020 -0500
f3a4c54
Add support for FEAT_MTPMU for Armv8.6
by Javier Almansa Sobrino
· Mon Nov 23 18:38:15 2020 +0000
5c29cba
aarch64/arm: Add compiler barrier to barrier instructions
by Andre Przywara
· Fri Oct 16 18:19:03 2020 +0100
ed20207
Increase type widths to satisfy width requirements
by Jimmy Brisson
· Tue Aug 04 16:18:52 2020 -0500
7e6306b
TF-A AMU extension: fix detection of group 1 counters.
by Alexei Fedorov
· Tue Jul 14 08:17:56 2020 +0100
90d6532
Provide a hint to power controller for DSU cluster power down
by Madhukar Pappireddy
· Wed Oct 30 14:24:39 2019 -0500
019b4f8
locks: bakery: use is_dcache_enabled() helper
by Masahiro Yamada
· Thu Apr 02 15:35:19 2020 +0900
a5c6636
Fix MISRA C issues in BL1/BL2/BL31
by John Powell
· Fri Mar 20 14:21:05 2020 -0500
84d681f
Merge "el3_entrypoint_common: avoid overwriting arg3" into integration
by Manish Pandey
· Thu Mar 19 22:35:13 2020 +0000
bfe7bb6
Use Speculation Barrier instruction for v8.5 cores
by Madhukar Pappireddy
· Tue Mar 10 18:04:59 2020 -0500
fcbcd6f
aarch32: stop speculative execution past exception returns
by Madhukar Pappireddy
· Wed Feb 26 12:37:05 2020 -0600
c241b57
el3_entrypoint_common: avoid overwriting arg3
by Yann Gautier
· Tue Jan 28 11:45:38 2020 +0100
20be077
Changes to support updated register usage in SMCCC v1.2
by Madhukar Pappireddy
· Sat Nov 09 23:28:08 2019 -0600
d2f21b8
Add missing support for BL2_AT_EL3 in XIP memory
by Lionel Debieve
· Mon May 27 09:32:00 2019 +0200
9074dea
AArch32: Disable Secure Cycle Counter
by Alexei Fedorov
· Tue Aug 20 15:22:44 2019 +0100
53456fc
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
by Julius Werner
· Tue Jul 09 13:49:11 2019 -0700
5553417
SSBS: init SPSR register with default SSBS value
by John Tsichritzis
· Tue Jul 23 11:12:41 2019 +0100
35e08da
console: update skeleton
by Ambroise Vincent
· Fri May 31 16:21:59 2019 +0100
007d745
arch: add some defines for generic timer registers
by Yann Gautier
· Wed Apr 17 13:47:07 2019 +0200
457c64e
aarch32: Allow compiling with soft-float toolchain
by Manish Pandey
· Mon Apr 01 15:27:18 2019 +0100
0a0ca8b
Console: remove deprecated finish_console_register
by Ambroise Vincent
· Wed Mar 27 15:45:35 2019 +0000
f5fdfbc
Cortex-A53: Workarounds for 819472, 824069 and 827319
by Ambroise Vincent
· Thu Feb 21 14:16:24 2019 +0000
404184d
Merge pull request #1831 from antonio-nino-diaz-arm/an/sccd
by Antonio Niño Díaz
· Wed Feb 27 09:21:42 2019 +0000
078e66f
plat/arm: Support for Cortex A5 in FVP Versatile Express platform
by Usama Arif
· Wed Dec 12 17:14:29 2018 +0000
b69ac08
Division functionality for cores that dont have divide hardware.
by Usama Arif
· Wed Dec 12 17:08:33 2018 +0000
3fbd3f5
Disable processor Cycle Counting in Secure state
by Antonio Nino Diaz
· Mon Feb 18 16:55:43 2019 +0000
d29d21e
drivers: generic_delay_timer: Assert presence of Generic Timer
by Antonio Nino Diaz
· Wed Feb 06 09:23:04 2019 +0000
c326c34
xlat v2: Dynamically detect need for CnP bit
by Antonio Nino Diaz
· Fri Jan 11 11:20:10 2019 +0000
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· Fri Dec 14 00:18:21 2018 +0000
8d1ade6
Reorganize architecture-dependent header files
by Antonio Nino Diaz
· Mon Dec 17 17:20:57 2018 +0000