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git01.mediatek.com / filogic / atf / 22a9871e4c248e488e3efe9926514f42364109ab / plat / rockchip / rk3399 / drivers / dram
  1. 22a9871 rockchip: rk3399: Clean up and seprate secure parts from SoC codes by Xing Zheng · 8 years ago
  2. b4bcc1d rockchip: Clean up header and referenced files by Xing Zheng · 8 years ago
  3. b4a7676 rockchip: rk3399: improve the m0 enable flow by Lin Huang · 8 years ago
  4. 52512c2 rockchip: rk3399: dram: set all ddr frequency pll_postdiv values to 0 by Lin Huang · 8 years ago
  5. dc8e82e rockchip: rk3399: enable CA training when do ddr dfs by Lin Huang · 8 years ago
  6. 0e8909d rockchip: rk3399: Enable per CS training at 666MHz by Derek Basehore · 8 years ago
  7. e13bc54 rockchip: rk3399: add support for ddrfreq suspend/resume by Derek Basehore · 8 years ago
  8. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · 8 years ago
  9. b106512 rk3399: dram: making phy into dll bypass mode at low frequency by Derek Basehore · 8 years ago
  10. ff461d0 rockchip: rk3399: dram: remove dram_init and dts_timing_receive function by Derek Basehore · 8 years ago
  11. f33eb2c rockchip: add support save/restore configuration for DDR during enter S3 by Caesar Wang · 8 years ago
  12. 8bc1667 rockchip: Change dmc register accesses to ATF style for rk3399 by Caesar Wang · 8 years ago
  13. a845690 rockchip: Break out common dram code for rk3399 by Caesar Wang · 8 years ago
  14. 251a34d rockchip: SIP call use 32 bit return value for rk3399 by Caesar Wang · 8 years ago
  15. 853559e rockchip: enable or disable auto power down base on frequency by Caesar Wang · 8 years ago
  16. 9740bba rockchip: rk3399: add dram driver by Caesar Wang · 8 years ago