1. 41eac8a Tegra: sip: add VPR resize enabled check by Anthony Zhou · Wed Dec 04 14:58:23 2019 +0800
  2. 76afaac Tegra: remove weakly defined per-platform SiP handler by Varun Wadekar · Thu May 17 10:14:30 2018 -0700
  3. 833d89c Revert "Tegra: Add support for fake system suspend" by Vignesh Radhakrishnan · Thu May 25 10:31:42 2017 -0700
  4. 48fef88 Tegra: SiP: set GPU in reset after vpr resize by Jeetesh Burman · Mon Jan 22 15:40:08 2018 +0530
  5. 0e07e45 Tegra: fix defects flagged by MISRA Rule 10.3 by Anthony Zhou · Wed Jul 26 17:16:54 2017 +0800
  6. 4408e88 Tegra: common: fix defects flagged by MISRA scan by Anthony Zhou · Fri Jul 07 14:29:51 2017 +0800
  7. 035f24b Tegra: sip_calls: fix defects flagged by MISRA scan by Anthony Zhou · Wed Mar 01 12:47:37 2017 +0800
  8. e5bd345 Tegra: sip_calls: fix defects flagged by MISRA scan by Anthony Zhou · Wed Mar 01 12:47:37 2017 +0800
  9. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  10. 5ac9d96 Fix pointer type mismatch of handlers by Masahiro Yamada · Thu Apr 19 01:18:48 2018 +0900
  11. e363146 Fix order of remaining platform #includes by Isla Mitchell · Fri Jul 14 10:46:32 2017 +0100
  12. a59a7c5 Tegra: memctrl: check GPU reset state from common place by Varun Wadekar · Wed Apr 26 08:31:50 2017 -0700
  13. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  14. 14f3957 Tegra186: Support AARCH32/64 encoding for MCE calls by Varun Wadekar · Mon Apr 17 11:54:33 2017 -0700
  15. b4a7294 Tegra: Add support for fake system suspend by Vignesh Radhakrishnan · Fri Mar 03 10:58:05 2017 -0800
  16. e0f3dfd Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · Tue Oct 11 18:59:52 2016 +0800
  17. dc79930 Tegra: implement FIQ interrupt handler by Varun Wadekar · Mon Dec 28 16:36:42 2015 -0800
  18. 2330edd Tegra: allow SiP smc calls from Secure World by Wayne Lin · Thu Mar 31 13:49:09 2016 -0700
  19. 923d04a Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · Wed Dec 09 18:18:53 2015 -0800[Renamed (82%) from plat/nvidia/tegra/soc/t210/plat_sip_calls.c]
  20. 3acb2b0 Merge pull request #845 from vwadekar/tegra-changes-from-downstream-v1 by davidcunado-arm · Thu Feb 23 17:30:54 2017 +0000