1. 1f5f812 Correct system include order by David Cunado · 7 years ago
  2. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  3. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 8 years ago
  4. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 8 years ago
  5. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  6. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 9 years ago
  7. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 9 years ago
  8. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  9. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  10. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  11. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  12. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  13. f1785fd Add platform API for reset handling by Soby Mathew · 10 years ago
  14. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago