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git01.mediatek.com / filogic / atf / 1f0d5852484c7fdca7b0154e335fb02fe02b5f64 / plat / xilinx / zynqmp / include
  1. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  2. 6f3ccc5 PSCI: Fix types of definitions by Antonio Nino Diaz · 6 years ago
  3. ee1a114 plat: xilinx: zynqmp: Build for DDR if SPD is enabled by Siva Durga Prasad Paladugu · 6 years ago
  4. efd431b zynqmp: Add wdt timeout restart functionality by Siva Durga Prasad Paladugu · 7 years ago
  5. 8f5ddb3 zynqmp: Use DDR memory when DEBUG is enabled by Jolly Shah · 7 years ago
  6. c150312 Update ULL() macro and instances of ull to comply with MISRA by David Cunado · 7 years ago
  7. 9bde130 zynqmp: Migrate to using interrupt properties by Jeenu Viswambharan · 7 years ago
  8. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  9. 6a9e03e zynqmp: Migrate to new address space macros by Soren Brinkmann · 8 years ago
  10. 1209b26 zynqmp: Remove dead code by Soren Brinkmann · 8 years ago
  11. 7ac746c zynqmp: Increase MAX_XLAT_TABLES by Soren Brinkmann · 8 years ago
  12. 802ba1d zynqmp: Change default BL31 address space by Soren Brinkmann · 8 years ago
  13. 6d1ba58 zynqmp: Separate code and rodata by Soren Brinkmann · 8 years ago
  14. 845cd5c zynqmp: Reduce mapped memory area by Soren Brinkmann · 9 years ago
  15. 4a9ca04 zynqmp: Revise memory configuration options by Soren Brinkmann · 9 years ago
  16. 2c7ed5b Dump platform-defined regs in crash reporting by Gerald Lejeune · 9 years ago
  17. 76fcae3 Add support for Xilinx Zynq UltraScale+ MPSOC by Soren Brinkmann · 9 years ago