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filogic
/
atf
/
1dfe497f520704214ad85669066f885ebfb222d2
/
plat
/
xilinx
/
versal_net
/
include
/
platform_def.h
1dfe497
feat(xilinx): add handler for power down req sgi irq
by Jay Buddhabhatti
· 1 year, 5 months ago
6da8794
fix(xilinx): rename macros to align with ARM
by Jay Buddhabhatti
· 12 months ago
efefcd4
feat(versal-net): ddr address reservation in dtb at runtime
by Amit Nagal
· 1 year, 2 months ago
c5b04f5
fix(versal-net): fix BLXX memory limits for user defined values
by Michal Simek
· 1 year, 4 months ago
2a47faa
style(xilinx): replace ARM by Arm in copyrights
by Michal Simek
· 1 year, 5 months ago
a63b354
refactor(versal): move set wake src fn to common place
by Jay Buddhabhatti
· 1 year, 7 months ago
6a44ad0
refactor(xilinx): rename gic macros to make common
by Jay Buddhabhatti
· 1 year, 7 months ago
3980f19
fix(versal_net): fix irq for IPI0
by Trung Tran
· 1 year, 6 months ago
9179436
feat(versal-net): add support for Xilinx Versal NET platform
by Michal Simek
· 2 years, 1 month ago