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git01.mediatek.com / filogic / atf / 1d88de135c253813e8838e9c8ac114fa6bf7c06b / fdts / tc-fvp.dtsi
  1. 6141897 feat(tc): add new TC4 RoS definitions by Jackson Cooper-Driver · Wed Apr 24 10:27:58 2024 +0100
  2. bd6755d feat(tc): change GIC DT property 'interrupt-cells' to 4 by Jagdish Gediya · Tue Apr 23 12:06:47 2024 +0100
  3. 4dd0e51 feat(tc): support full-HD resolution for the FVP model by Sergio Alves · Wed Dec 06 15:24:44 2023 +0000
  4. e0c2410 refactor(tc): append properties in DT bindings by Leo Yan · Mon Apr 15 11:35:15 2024 +0100
  5. 815f550 refactor(tc): introduce a new file tc-fpga.dtsi by Leo Yan · Wed Apr 24 09:57:28 2024 +0100
  6. e2c373c refactor(tc): rename 'tc_fvp.dtsi' to 'tc-fvp.dtsi' by Leo Yan · Sun Apr 14 21:34:59 2024 +0100[Renamed from fdts/tc_fvp.dtsi]
  7. 9ac73a4 refactor(tc): move the FVP RoS to a separate file by Boyan Karatotev · Tue Nov 14 09:38:08 2023 +0000