- ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · 4 years, 4 months ago
- 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · 4 years, 4 months ago
- 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · 4 years, 5 months ago
- 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · 4 years, 7 months ago
- ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · 4 years, 7 months ago
- 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · 4 years, 6 months ago
- 3e24c16 Enable v8.6 WFE trap delays by johpow01 · 4 years, 7 months ago
- 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · 4 years, 7 months ago
- 90d6532 Provide a hint to power controller for DSU cluster power down by Madhukar Pappireddy · 5 years ago
- a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · 4 years, 8 months ago
- 813c9f9 Fix crash dump for lower EL by Alexei Fedorov · 4 years, 9 months ago
- c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · 4 years, 9 months ago
- bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · 4 years, 9 months ago
- 787a129 Tegra: delay_timer: support for physical secure timer by Varun Wadekar · 6 years ago
- a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · 5 years ago
- 023c155 Add support for enabling S-EL2 by Achin Gupta · 5 years ago
- c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · 5 years ago
- 83e0488 Add UBSAN support and handlers by Justin Chadwell · 5 years ago
- 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · 5 years ago
- c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · 5 years ago
- 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
- a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · 5 years ago
- c97455a Merge changes from topic "jts/spsr" into integration by Soby Mathew · 5 years ago
- 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · 5 years ago
- 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · 5 years ago
- 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · 5 years ago
- c31ab38 Aarch64: Fix SCTLR bit definitions by Alexei Fedorov · 5 years ago
- 007d745 arch: add some defines for generic timer registers by Yann Gautier · 6 years ago
- 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · 5 years ago
- 37f97a5 SPM: Move shim layer to TTBR1_EL1 by Antonio Nino Diaz · 6 years ago
- 1f9ff49 Apply variant 4 mitigation for Neoverse N1 by John Tsichritzis · 6 years ago
- f6505a7 Merge pull request #1845 from ambroise-arm/av/errata by Antonio Niño Díaz · 6 years ago
- 92cad35 Merge pull request #1846 from loumay-arm/lm/mpam by Antonio Niño Díaz · 6 years ago
- bdfa103 MPAM: enable MPAM EL2 traps by Louis Mayencourt · 6 years ago
- 23b7b69 Merge pull request #1839 from loumay-arm/lm/a7x_errata by Antonio Niño Díaz · 6 years ago
- f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · 6 years ago
- 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · 6 years ago
- 78a0aed Add workaround for errata 764081 of Cortex-A75 by Louis Mayencourt · 6 years ago
- 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · 6 years ago
- 7415597 lib/xlat_tables: Add support for ARMv8.4-TTST by Sathees Balya · 6 years ago
- c326c34 xlat v2: Dynamically detect need for CnP bit by Antonio Nino Diaz · 6 years ago
- e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
- 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · 6 years ago[Renamed from include/lib/aarch64/arch.h]
- 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · 6 years ago