Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
1cc3aaa416542385eacb2e5e9701be597caaf3d0
/
plat
/
intel
/
soc
/
agilex
/
platform.mk
36a9f30
intel: Add bridge control for FPGA reconfig
by Hadi Asyrafi
· Tue Dec 24 10:42:52 2019 +0800
8ebd237
intel: System Manager refactoring
by Hadi Asyrafi
· Mon Dec 23 17:58:04 2019 +0800
67cb0ea
intel: Refactor reset manager driver
by Hadi Asyrafi
· Mon Dec 23 13:25:33 2019 +0800
5ae876f
intel: Refactor common platform code [5/5]
by Hadi Asyrafi
· Wed Oct 23 17:58:06 2019 +0800
4d9f395
intel: Refactor common platform code [4/5]
by Hadi Asyrafi
· Wed Oct 23 17:35:32 2019 +0800
6f8a2b2
intel: Refactor common platform code [3/5]
by Hadi Asyrafi
· Wed Oct 23 18:34:14 2019 +0800
f0fa807
intel: Refactor common platform code [2/5]
by Hadi Asyrafi
· Wed Oct 23 17:02:55 2019 +0800
9f5dfc9
intel: Refactor common platform code [1/5]
by Hadi Asyrafi
· Wed Oct 23 16:26:53 2019 +0800
461f8f4
Invalidate dcache build option for bl2 entry at EL3
by Hadi Asyrafi
· Tue Aug 20 15:33:27 2019 +0800
309ac01
intel: Platform common code refactor
by Hadi Asyrafi
· Thu Aug 01 14:48:39 2019 +0800
6a240c7
intel: Platform common code refactor
by Hadi Asyrafi
· Thu Aug 01 15:21:20 2019 +0800
616da77
intel: Adds support for Agilex platform
by Hadi Asyrafi
· Thu Jun 27 11:34:03 2019 +0800