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git01.mediatek.com / filogic / atf / 186736704b7dfe7897ee832e214ae0e5b648f5fc / bl1 / aarch32
  1. a533ae7 Refactor SPSR initialisation code by John Tsichritzis · Mon Jul 01 14:27:33 2019 +0100
  2. adfa8b0 bl1-smc-handler: Ensure the lower-order 16 bits of SPSR are programmed by Bryan O'Donoghue · Tue Mar 12 12:09:51 2019 +0000
  3. e3887a9 BL1: Enable pointer authentication support by Antonio Nino Diaz · Wed Jan 30 20:29:50 2019 +0000
  4. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  5. 128de8d xlat v2: Support the EL2 translation regime by Antonio Nino Diaz · Tue Aug 07 19:59:49 2018 +0100
  6. 3c817f4 Rename 'smcc' to 'smccc' by Antonio Nino Diaz · Wed Mar 21 10:49:27 2018 +0000
  7. 094041d aarch32: use lr as bl32 boot argument on aarch32 only systems by Etienne Carriere · Fri Feb 02 13:16:18 2018 +0100
  8. 09bb548 Merge pull request #978 from etienne-lms/minor-build by danh-arm · Wed Jun 28 13:46:19 2017 +0100
  9. ba7c3d5 bl1: include bl1_private.h in aarch* files by Etienne Carriere · Wed Jun 07 16:41:50 2017 +0200
  10. bfe12d3 bl: security_state should be of type unsigned int by Etienne Carriere · Wed Jun 07 16:45:42 2017 +0200
  11. fee8653 Fully initialise essential control registers by David Cunado · Thu Apr 13 22:38:29 2017 +0100
  12. cdd03cb AArch32: Add `TRUSTED_BOARD_BOOT` support by dp-arm · Wed Feb 15 11:07:55 2017 +0000
  13. f3e3a43 AArch32: Rework SMC context save and restore mechanism by Soby Mathew · Thu Mar 30 14:42:54 2017 +0100
  14. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  15. 64abad2 AArch32: Fix detection of virtualization support by Yatharth Kochar · Fri Sep 23 10:48:29 2016 +0100
  16. 5d36121 AArch32: Add generic changes in BL1 by Yatharth Kochar · Tue Jun 28 17:07:09 2016 +0100