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filogic
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atf
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17d07627015c6977139eb2d225f8d22d15a101d1
/
plat
/
intel
/
soc
/
n5x
/
include
/
socfpga_plat_def.h
28c1c78
feat(intel): restructure sys mgr for S10/N5X
by Jit Loon Lim
· 1 year, 3 months ago
f48707a
feat(intel): implement timer init divider via CPU frequency for N5X
by Sieu Mun Tang
· 2 years, 2 months ago
2cebbc6
Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration
by Madhukar Pappireddy
· 2 years, 3 months ago
a4a4327
feat(intel): implement timer init divider via cpu frequency. (#1)
by BenjaminLimJL
· 2 years, 5 months ago
82cf5df
feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge
by Sieu Mun Tang
· 2 years, 4 months ago
a544da1
fix(intel): make FPGA memory configurations platform specific
by Sieu Mun Tang
· 2 years, 6 months ago
8881ad0
build(intel): add N5X as a new Intel platform
by Sieu Mun Tang
· 2 years, 6 months ago