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filogic
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15fdeef3a3d54218a796ea6bb89ec448bebeed2d
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plat
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nvidia
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tegra
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include
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t210
1b0c124
Tegra: per-SoC DRAM base values
by Varun Wadekar
· Tue May 15 11:24:59 2018 -0700
a8c61ac
Tegra: restrict non-secure PMC accesses
by Varun Wadekar
· Mon Mar 12 15:11:55 2018 -0700
8c6517d
Tegra210: skip past sc7entry-fw signature header
by Varun Wadekar
· Mon Mar 19 15:19:28 2018 -0700
a1ad9b7
Tegra210: SiP handlers to allow PMC access
by kalyani chidambaram
· Tue Mar 06 16:36:57 2018 -0800
dae2796
Tegra210: power off all DMA masters before System Suspend entry
by Varun Wadekar
· Mon Mar 05 10:19:37 2018 -0800
f07d6de
Tegra: support for System Suspend using sc7entry-fw binary
by Varun Wadekar
· Tue Feb 27 14:33:57 2018 -0800
d8c50e4
Tegra210: remove support for cluster power down
by Varun Wadekar
· Wed Feb 14 11:06:05 2018 -0800
ba31328
Tegra210: support for cluster idle from the CPU
by Varun Wadekar
· Tue Feb 13 20:31:12 2018 -0800
0cb8b33
Tegra: platform dependent address space sizes
by Steven Kao
· Fri Feb 09 20:50:02 2018 +0800
4538bfc
Tegra210: Enable WDT_CPU interrupt for FIQ Debugger
by Varun Wadekar
· Wed Jan 02 17:53:15 2019 -0800
48fef88
Tegra: SiP: set GPU in reset after vpr resize
by Jeetesh Burman
· Mon Jan 22 15:40:08 2018 +0530
359be95
Tegra: memctrl: clean MC INT status before exit to bootloader
by Harvey Hsieh
· Mon Aug 21 15:01:53 2017 +0800
69b0e4a
Tegra210_B01: SC7: Select RNG mode based on ECID
by Samuel Payne
· Thu Jun 15 21:12:45 2017 -0700
40d3a67
Tegra210B01: SE/SE2 and PKA1 context save (SW)
by Marvin Hsu
· Tue Apr 11 11:00:48 2017 +0800
0e07e45
Tegra: fix defects flagged by MISRA Rule 10.3
by Anthony Zhou
· Wed Jul 26 17:16:54 2017 +0800
1e6bed4
Tegra210: se: enable entropy/SE clocks before system suspend
by Samuel Payne
· Mon Jun 12 10:15:43 2017 -0700
ae1e079
Tegra210: se: disable SMMU before suspending SE block
by Samuel Payne
· Mon Jun 12 16:38:23 2017 -0700
08554a6
Tegra210: memmap all the IRAM memory banks
by Varun Wadekar
· Mon Jun 12 16:47:16 2017 -0700
a6a357f
Tegra210: bpmp: power management interface
by Varun Wadekar
· Fri May 05 09:20:59 2017 -0700
21eea97
Tegra210B01: SE1 and SE2/PKA1 context save (atomic)
by Marvin Hsu
· Tue Apr 11 11:00:48 2017 +0800
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· Fri Dec 14 00:18:21 2018 +0000
5eb8837
Standardise header guards across codebase
by Antonio Nino Diaz
· Thu Nov 08 10:20:19 2018 +0000
a59a7c5
Tegra: memctrl: check GPU reset state from common place
by Varun Wadekar
· Wed Apr 26 08:31:50 2017 -0700
761ca73
Tegra: add explicit casts for integer macros
by Varun Wadekar
· Mon Apr 24 14:17:12 2017 -0700
f68b96c
Tegra: Break circular dependency in platform header files
by Sandrine Bailleux
· Thu May 11 14:30:20 2017 +0100
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
4d160ac
Tegra: memmap Tegra micro-seconds timer controller
by Steven Kao
· Fri Dec 23 16:05:13 2016 +0800
64443ca
Tegra: drivers: memctrl: move chip specific defines to tegra_def.h
by Varun Wadekar
· Mon Dec 12 16:14:57 2016 -0800
28dcc21
Tegra: support for silicon/simulation platforms
by Varun Wadekar
· Wed Jul 20 10:28:51 2016 -0700
3ce5499
Tegra: define platform power states
by Varun Wadekar
· Tue Jan 19 13:55:19 2016 -0800
0dc9181
Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM
by Varun Wadekar
· Wed Dec 30 15:06:41 2015 -0800
d2014c6
Tegra: init normal/crash console for platforms
by Varun Wadekar
· Thu Oct 29 10:37:28 2015 +0530
b24dea9
Tegra: enable processor retention and L2/CPUECTLR access
by Varun Wadekar
· Tue Sep 22 13:33:56 2015 +0530
bc78744
Tegra210: enable WRAP to INCR burst type conversions
by Varun Wadekar
· Mon Jul 27 13:00:50 2015 +0530
81b1383
Implement get_sys_suspend_power_state() handler for Tegra
by Varun Wadekar
· Fri Jul 03 16:31:28 2015 +0530
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· Tue May 19 16:48:04 2015 +0530