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git01.mediatek.com / filogic / atf / 15f10bd3f6323f4e149cedf2e210fafdff99a274 / drivers / nxp / ddr / phy-gen2
  1. b27ac80 refactor(plat/nxp): refine api to read SVR register by Jiafei Pan · Tue Jul 20 17:14:32 2021 +0800
  2. c518de4 nxp: ddr driver enablement for nxp layerscape soc by Pankaj Gupta · Wed Dec 09 14:02:39 2020 +0530