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git01.mediatek.com / filogic / atf / 13a721d3131e7e0b9356c8de4ec07f1d0747f378 / plat / intel / soc / agilex5 / include / socfpga_plat_def.h
  1. 5436c68 fix(intel): update nand driver to match GHRD design by Girisha Dengi · 10 months ago
  2. 6e42279 feat(intel): add in QSPI ECC for Linux by Jit Loon Lim · 12 months ago
  3. 94f4418 Merge "feat(intel): restructure watchdog" into integration by Manish Pandey · 9 months ago
  4. e8bffd9 Merge "feat(intel): increase bl2 size limit" into integration by Manish Pandey · 9 months ago
  5. f6186b2 feat(intel): increase bl2 size limit by Jit Loon Lim · 11 months ago
  6. 6be3c34 fix(intel): revert sys counter to 400MHz by Jit Loon Lim · 1 year ago
  7. 6284537 feat(intel): restructure watchdog by Sieu Mun Tang · 1 year, 3 months ago
  8. 4c249f1 feat(intel): platform enablement for Agilex5 SoC FPGA by Jit Loon Lim · 1 year, 4 months ago