1. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  2. 2b40ca6 aarch32: Implement errata workarounds for Cortex A57 by Dimitris Papastamos · 7 years ago
  3. 9c47a5a aarch32: Implement errata workarounds for Cortex A53 by Dimitris Papastamos · 7 years ago
  4. 370542e aarch32: Implement cpu_rev_var_hs() by Dimitris Papastamos · 7 years ago
  5. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  6. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  7. bf360df Merge pull request #910 from dp-arm/dp/AArch32-juno-port by davidcunado-arm · 7 years ago
  8. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  9. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 7 years ago
  10. 9d92e8c Replace ASM signed tests with unsigned by Douglas Raillard · 7 years ago
  11. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  12. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  13. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  14. adb7027 AArch32: Fix the stack alignment issue by Soby Mathew · 8 years ago
  15. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  16. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  17. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 8 years ago