1. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 10 years ago
  2. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  3. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  4. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  5. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  6. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  7. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  8. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  9. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  10. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · 10 years ago
  11. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  12. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  13. ed6ff95 Split platform.h into separate headers by Dan Handley · 10 years ago
  14. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · 10 years ago
  15. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  16. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · 10 years ago
  17. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · 11 years ago
  18. bcd60ba Separate BL functions out of arch.h by Dan Handley · 11 years ago
  19. a70615f Move include and source files to logical locations by Dan Handley · 11 years ago[Renamed from include/aarch64/arch.h]
  20. 992dc07 Merge pull request #50 from vikramkanigiri/vk/tf-issues#26 by achingupta · 11 years ago