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git01.mediatek.com / filogic / atf / 109a480a6fe1e55aaae40119b3ad461907a506c2 / drivers / st / clk / clk-stm32-core.c
  1. 21d117a fix(st-clock): remove useless switch by Yann Gautier · Fri Nov 25 10:42:52 2022 +0100
  2. 51dad68 fix(st-clock): use Boolean type for tests by Yann Gautier · Mon Nov 28 14:56:58 2022 +0100
  3. 2129ab1 refactor(st-clock): code size optimization by Gabriel Fernandez · Tue Jun 21 15:31:30 2022 +0200
  4. bd513f5 fix(st-clock): correct MISRA C2012 15.6 by Yann Gautier · Tue Jun 21 14:34:13 2022 +0200
  5. 8d13723 fix(st-clock): correctly check ready bit by Yann Gautier · Tue Jun 21 15:12:27 2022 +0200
  6. d56fff3 fix(st-clock): correct stm32_clk_parse_fdt_by_name by Yann Gautier · Tue Apr 05 15:16:28 2022 +0200
  7. 972221c fix(st-clock): check _clk_stm32_get_parent return by Yann Gautier · Tue Mar 29 09:51:21 2022 +0200
  8. 1308d75 feat(st-clock): add clock driver for STM32MP13 by Gabriel Fernandez · Wed Mar 11 11:30:34 2020 +0100