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git01.mediatek.com / filogic / atf / 1030103ab6ed8843d74c5f68d7bdba37d39dec7c / drivers / arm / smmu
  1. 9e505f9 refactor(cpufeat): add macro to simplify is_feat_xx_present by Sona Mathew · Wed Mar 13 11:33:54 2024 -0500
  2. 884cc02 feat(smmu): separate out smmuv3_security_init from smmuv3_init by Vijayenthiran Subramaniam · Thu Dec 21 17:34:05 2023 +0530
  3. c2d4635 feat(smmu): fix to perform INV_ALL before enabling GPC by Vivek Gautam · Thu Dec 14 13:58:21 2023 +0530
  4. b666e71 feat(smmu): add SMMU abort transaction function by Lucian Paul-Trifu · Fri Mar 25 14:30:20 2022 +0000
  5. 73ad731 feat(smmu): configure SMMU Root interface by Olivier Deprez · Fri Feb 04 12:30:11 2022 +0100
  6. bda60d3 SMMUv3:Changed retry loop to delay timer(GENFW-3329) by Deepika Bhavnani · Thu Oct 31 14:09:52 2019 -0600
  7. 896799a SMMUv3: Abort DMA transactions by Alexei Fedorov · Thu May 09 12:14:40 2019 +0100
  8. 6b4a5f0 SMMUv3: refactor the driver code by Alexei Fedorov · Fri Apr 26 12:07:07 2019 +0100
  9. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  10. 844b487 Mark GICV3, CCI and CCN boot time code as init by Daniel Boulby · Tue Sep 18 13:36:39 2018 +0100
  11. feacba3 drivers: smmu: Fix MISRA defects by Antonio Nino Diaz · Tue Aug 21 16:12:29 2018 +0100
  12. fef5d2d Fix MISRA Rule 5.3 Part 2 by Daniel Boulby · Fri May 04 14:04:07 2018 +0100
  13. 5c50304 Add SMMUv3 driver by Jeenu Viswambharan · Fri May 26 14:15:40 2017 +0100