1. 06a38e2 plat: marvell: armada: Add missing FORCE, .PHONY and clean targets by Pali Rohár · Mon Nov 23 19:45:28 2020 +0100
  2. 3666d48 plat: marvell: armada: Add new target mrvl_bootimage by Pali Rohár · Thu Oct 29 16:50:19 2020 +0100
  3. 6dca2c6 plat: marvell: armada: Building ${DOIMAGETOOL} is only for a8k by Pali Rohár · Wed Oct 21 11:50:40 2020 +0200
  4. 85e0a89 plat: marvell: armada: Fix including plat/marvell/marvell.mk file by Pali Rohár · Mon Oct 19 17:10:11 2020 +0200
  5. 44dad22 plat: marvell: ap806: implement workaround for errata-id FE-4265711 by Stefan Chulski · Mon Jun 24 19:13:38 2019 +0300
  6. 781ef5b Merge changes from topic "release/14.0" into integration by Manish Pandey · Mon Aug 10 23:13:36 2020 +0000
  7. 388248a Use abspath to dereference $BUILD_BASE by Grant Likely · Thu Jul 30 08:50:10 2020 +0100
  8. ff987a9 plat: marvell: t9130: add SVC support by Alex Evraev · Mon May 06 13:15:07 2019 +0300
  9. baeed5f plat: marvell: t9130: update AVS settings by Grzegorz Jaszczyk · Thu Jan 24 10:18:33 2019 +0100
  10. 3486136 plat: marvell: t9130: pass actual CP count for load_image by Ben Peled · Wed Mar 27 16:26:02 2019 +0200
  11. e163b34 plat: marvell: armada: a7k: add support to SVC validation mode by Alex Evraev · Sun Aug 11 13:38:15 2019 +0300
  12. e8e03c8 Merge changes I0826ef8b,I9b4659a1 into integration by Manish Pandey · Tue Jul 21 21:49:09 2020 +0000
  13. 2850326 plat: marvell: armada: a8k: change CCU LLC SRAM mapping by Konstantin Porotchkin · Mon Apr 15 16:32:59 2019 +0300
  14. b5fa64a plat: marvell: armada: adjust trusted DRAM size to match OP-TEE OS by Konstantin Porotchkin · Mon Apr 15 16:25:59 2019 +0300
  15. 65b9afa drivers: marvell: mg_conf_cm3: add basic driver by Grzegorz Jaszczyk · Fri Apr 12 16:53:49 2019 +0200
  16. 7a75c06 plat: marvell: armada: a8k: common: Fix a8k_common.mk to use BOARD_DIR variable by Luka Kovacic · Fri Jul 03 17:02:54 2020 +0200
  17. 841ffeb plat: marvell: armada: a8k: add OP-TEE OS MMU tables by Konstantin Porotchkin · Mon Apr 15 16:29:08 2019 +0300
  18. d2a19cc plat: marvell: armada: reduce memory size reserved for FIP image by Marcin Wojtas · Fri Jun 19 17:51:08 2020 +0200
  19. 5f8630b plat: marvell: armada: platform definitions cleanup by Konstantin Porotchkin · Fri Jun 19 17:48:48 2020 +0200
  20. ac2cf92 plat: marvell: armada: a8k: check CCU window state before loading MSS BL2 by Konstantin Porotchkin · Sun Mar 31 17:22:53 2019 +0300
  21. 7947359 plat: marvell: a8k: move address config of cp1/2 to BL2 by Ben Peled · Tue Mar 26 19:06:24 2019 +0200
  22. 459366b plat: marvell: armada: re-enable BL32_BASE definition by Konstantin Porotchkin · Thu Mar 14 17:24:40 2019 +0200
  23. d3d6a1c plat: marvell: a8k: extend includes to take advantage of the phy_porting_layer by Grzegorz Jaszczyk · Thu Mar 28 16:09:38 2019 +0100
  24. 95ad87c plat: marvell: armada: configure amb for all CPs by Grzegorz Jaszczyk · Fri Apr 12 12:56:07 2019 +0200
  25. 605162e ble: ap807: clean-up PLL configuration sequence by Alex Leibovich · Sun Feb 10 15:08:25 2019 +0200
  26. 582fdfd plat: marvell: mci: perform mci link tuning for all mci interfaces by Grzegorz Jaszczyk · Wed Feb 06 14:16:51 2019 +0100
  27. 106eb82 plat: marvell: mci: use more meaningful name for mci link tuning by Grzegorz Jaszczyk · Thu Feb 07 15:15:14 2019 +0100
  28. e59fd0a plat: marvell: a8k: remove wrong or unnecessary comments by Grzegorz Jaszczyk · Wed Feb 06 15:58:42 2019 +0100
  29. 785ab75 plat: marvell: ap807: enable snoop filter for ap807 by Grzegorz Jaszczyk · Wed Jan 23 15:47:57 2019 +0100
  30. 02721c7 plat: marvell: ap807: update configuration space of each CP by Grzegorz Jaszczyk · Sun Jan 13 17:33:45 2019 +0200
  31. a5d0627 plat: marvell: add support for PLL 2.2GHz mode by Grzegorz Jaszczyk · Thu Dec 20 17:13:19 2018 +0100
  32. 2d3d86a plat: marvell: armada: make a8k_common.mk and mss_common.mk more generic by Grzegorz Jaszczyk · Sun Dec 09 23:11:20 2018 +0100
  33. 3039bce marvell: armada: add extra level in marvell platform hierarchy by Grzegorz Jaszczyk · Tue Nov 05 13:14:59 2019 +0100