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atf
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0ba2e177f5db0b54aa209355ffa17d1f9801aff8
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include
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arch
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aarch64
f3a4c54
Add support for FEAT_MTPMU for Armv8.6
by Javier Almansa Sobrino
· Mon Nov 23 18:38:15 2020 +0000
9ecc255
Merge "Aarch64: Add support for FEAT_PANx extensions" into integration
by Manish Pandey
· Thu Dec 03 13:08:02 2020 +0000
af54f6e
Aarch64: Add support for FEAT_MTE3
by Alexei Fedorov
· Tue Dec 01 13:22:25 2020 +0000
c082f03
Aarch64: Add support for FEAT_PANx extensions
by Alexei Fedorov
· Wed Nov 25 14:07:05 2020 +0000
5c29cba
aarch64/arm: Add compiler barrier to barrier instructions
by Andre Przywara
· Fri Oct 16 18:19:03 2020 +0100
ed20207
Increase type widths to satisfy width requirements
by Jimmy Brisson
· Tue Aug 04 16:18:52 2020 -0500
bde5c95
Add wrapper for AT instruction
by Manish V Badarkhe
· Tue Jul 14 14:43:12 2020 +0100
e07e808
runtime_exceptions: Update AT speculative workaround
by Manish V Badarkhe
· Thu Jul 23 12:43:25 2020 +0100
7e6306b
TF-A AMU extension: fix detection of group 1 counters.
by Alexei Fedorov
· Tue Jul 14 08:17:56 2020 +0100
9223485
Prevent RAS register access from lower ELs
by Varun Wadekar
· Fri Jun 12 10:11:28 2020 -0700
8357389
Enable ARMv8.6-ECV Self-Synch when booting to EL2
by Jimmy Brisson
· Thu Apr 16 10:48:02 2020 -0500
ecc3c67
Enable ARMv8.6-FGT when booting to EL2
by Jimmy Brisson
· Thu Apr 16 10:47:56 2020 -0500
1993355
TF-A: Fix wrong register read for MPAM extension
by Alexei Fedorov
· Tue May 26 13:16:41 2020 +0100
3e24c16
Enable v8.6 WFE trap delays
by johpow01
· Wed Apr 22 14:05:13 2020 -0500
5dc9e9c
Fix compilation error when ENABLE_PIE=1
by Varun Wadekar
· Sat May 16 20:59:30 2020 -0700
2801ed4
Implement workaround for AT speculative behaviour
by Manish V Badarkhe
· Tue Apr 28 04:53:32 2020 +0100
2bae35f
SPMD: code/comments cleanup
by Olivier Deprez
· Thu Apr 16 13:39:06 2020 +0200
90d6532
Provide a hint to power controller for DSU cluster power down
by Madhukar Pappireddy
· Wed Oct 30 14:24:39 2019 -0500
019b4f8
locks: bakery: use is_dcache_enabled() helper
by Masahiro Yamada
· Thu Apr 02 15:35:19 2020 +0900
a5c6636
Fix MISRA C issues in BL1/BL2/BL31
by John Powell
· Fri Mar 20 14:21:05 2020 -0500
8a6e961
Add get_current_el_maybe_constant()
by Masahiro Yamada
· Thu Mar 26 13:18:48 2020 +0900
442f0df
Merge "Use Speculation Barrier instruction for v8.5 cores" into integration
by Mark Dykes
· Thu Mar 12 14:32:13 2020 +0000
bfe7bb6
Use Speculation Barrier instruction for v8.5 cores
by Madhukar Pappireddy
· Tue Mar 10 18:04:59 2020 -0500
813c9f9
Fix crash dump for lower EL
by Alexei Fedorov
· Tue Mar 03 13:31:58 2020 +0000
c9e2c92
SPMD: Adds partially supported EL2 registers.
by Max Shvetsov
· Mon Feb 17 16:15:47 2020 +0000
bdf502d
SPMD: save/restore EL2 system registers.
by Max Shvetsov
· Tue Feb 25 13:56:19 2020 +0000
787a129
Tegra: delay_timer: support for physical secure timer
by Varun Wadekar
· Mon Jun 18 16:15:51 2018 -0700
b8f26e9
Make PAC demangling more generic
by Alexei Fedorov
· Thu Feb 06 17:11:03 2020 +0000
0f7e601
Prevent speculative execution past ERET
by Anthony Steinhauser
· Tue Jan 07 15:44:06 2020 -0800
31a14e1
bl31: Split into two separate memory regions
by Samuel Holland
· Wed Oct 17 21:40:18 2018 -0500
eb1e7e4
Merge changes from topic "aa/sel2_support" into integration
by Olivier Deprez
· Fri Dec 13 16:26:32 2019 +0000
c825768
PIE: make call to GDT relocation fixup generalized
by Manish Pandey
· Tue Nov 26 11:34:17 2019 +0000
a533447
S-EL2 Support: Check for AArch64
by Artsem Artsemenka
· Tue Nov 26 16:40:31 2019 +0000
023c155
Add support for enabling S-EL2
by Achin Gupta
· Fri Oct 11 14:44:05 2019 +0100
add24a4
Explicitly disable the SPME bit in MDCR_EL3
by Petre-Ionut Tudor
· Thu Oct 03 17:09:08 2019 +0100
d2f21b8
Add missing support for BL2_AT_EL3 in XIP memory
by Lionel Debieve
· Mon May 27 09:32:00 2019 +0200
7c9a4e6
Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration
by Soby Mathew
· Fri Sep 13 15:22:23 2019 +0000
f41355c
Refactor ARMv8.3 Pointer Authentication support code
by Alexei Fedorov
· Fri Sep 13 14:11:59 2019 +0100
461f8f4
Invalidate dcache build option for bl2 entry at EL3
by Hadi Asyrafi
· Tue Aug 20 15:33:27 2019 +0800
c235b12
Merge changes from topic "jc/mte_enable" into integration
by Soby Mathew
· Thu Sep 12 12:31:22 2019 +0000
83e0488
Add UBSAN support and handlers
by Justin Chadwell
· Tue Aug 20 11:01:52 2019 +0100
1c7c13a
Enable MTE support in both secure and non-secure worlds
by Justin Chadwell
· Thu Jul 18 14:25:33 2019 +0100
c7a7cc3
Merge "AArch64: Disable Secure Cycle Counter" into integration
by Paul Beesley
· Fri Aug 23 11:26:57 2019 +0000
503bbf3
AArch64: Disable Secure Cycle Counter
by Alexei Fedorov
· Tue Aug 13 15:17:53 2019 +0100
a95a589
FVP_Base_AEMv8A platform: Fix cache maintenance operations
by Alexei Fedorov
· Mon Jul 29 17:22:53 2019 +0100
53456fc
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
by Julius Werner
· Tue Jul 09 13:49:11 2019 -0700
c97455a
Merge changes from topic "jts/spsr" into integration
by Soby Mathew
· Thu Jul 25 09:13:49 2019 +0000
5553417
SSBS: init SPSR register with default SSBS value
by John Tsichritzis
· Tue Jul 23 11:12:41 2019 +0100
4bf6afa
Merge "Enable MTE support unilaterally for Normal World" into integration
by Soby Mathew
· Tue Jul 23 08:55:10 2019 +0000
830f0ad
Enable MTE support unilaterally for Normal World
by Soby Mathew
· Fri Jul 12 09:23:38 2019 +0100
c31ab38
Aarch64: Fix SCTLR bit definitions
by Alexei Fedorov
· Wed Jul 10 10:49:12 2019 +0100
007d745
arch: add some defines for generic timer registers
by Yann Gautier
· Wed Apr 17 13:47:07 2019 +0200
90f2e88
Add support for Branch Target Identification
by Alexei Fedorov
· Fri May 24 12:17:09 2019 +0100
16d006b
Workaround for cortex-A76 errata 1286807
by Soby Mathew
· Fri May 03 13:17:56 2019 +0100
bc6fdc0
Remove deprecated interfaces
by Ambroise Vincent
· Wed Mar 27 16:06:02 2019 +0000
0a0ca8b
Console: remove deprecated finish_console_register
by Ambroise Vincent
· Wed Mar 27 15:45:35 2019 +0000
37f97a5
SPM: Move shim layer to TTBR1_EL1
by Antonio Nino Diaz
· Wed Mar 27 11:10:31 2019 +0000
1f9ff49
Apply variant 4 mitigation for Neoverse N1
by John Tsichritzis
· Mon Mar 04 16:41:26 2019 +0000
b091eb9
Ensure proper ID register is checked for feature detection
by Dimitris Papastamos
· Wed Feb 27 11:46:48 2019 +0000
e1e7845
Correctly check for support of Address Authentication
by Antonio Nino Diaz
· Fri Mar 01 09:35:26 2019 +0000
f6505a7
Merge pull request #1845 from ambroise-arm/av/errata
by Antonio Niño Díaz
· Fri Mar 01 09:17:27 2019 +0000
92cad35
Merge pull request #1846 from loumay-arm/lm/mpam
by Antonio Niño Díaz
· Fri Mar 01 09:17:16 2019 +0000
bdfa103
MPAM: enable MPAM EL2 traps
by Louis Mayencourt
· Mon Feb 11 11:25:50 2019 +0000
23b7b69
Merge pull request #1839 from loumay-arm/lm/a7x_errata
by Antonio Niño Díaz
· Thu Feb 28 10:19:24 2019 +0000
f5fdfbc
Cortex-A53: Workarounds for 819472, 824069 and 827319
by Ambroise Vincent
· Thu Feb 21 14:16:24 2019 +0000
25cda67
Add support for pointer authentication
by Antonio Nino Diaz
· Tue Feb 19 11:53:51 2019 +0000
594811b
Add ARMv8.3-PAuth registers to CPU context
by Antonio Nino Diaz
· Thu Jan 31 11:58:00 2019 +0000
78a0aed
Add workaround for errata 764081 of Cortex-A75
by Louis Mayencourt
· Wed Feb 20 12:11:41 2019 +0000
3fbd3f5
Disable processor Cycle Counting in Secure state
by Antonio Nino Diaz
· Mon Feb 18 16:55:43 2019 +0000
a884dfb
libc: Move setjmp to libc folder
by Antonio Nino Diaz
· Fri Feb 08 13:20:37 2019 +0000
4586d1c
Make setjmp.h prototypes comply with the C standard
by Antonio Nino Diaz
· Fri Feb 08 13:10:45 2019 +0000
d29d21e
drivers: generic_delay_timer: Assert presence of Generic Timer
by Antonio Nino Diaz
· Wed Feb 06 09:23:04 2019 +0000
7415597
lib/xlat_tables: Add support for ARMv8.4-TTST
by Sathees Balya
· Fri Jan 25 11:36:01 2019 +0000
d1301a9
Helper function to read ID_AFR0_EL1 system register
by Varun Wadekar
· Wed Jan 23 09:41:28 2019 -0800
c326c34
xlat v2: Dynamically detect need for CnP bit
by Antonio Nino Diaz
· Fri Jan 11 11:20:10 2019 +0000
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· Fri Dec 14 00:18:21 2018 +0000
8d1ade6
Reorganize architecture-dependent header files
by Antonio Nino Diaz
· Mon Dec 17 17:20:57 2018 +0000