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git01.mediatek.com / filogic / atf / 0a68d133822b6990fdaf9f06386479541b9a3275 / lib / cpus
  1. 815faa8 Use a callee-saved register to be AAPCS-compliant by dp-arm · 8 years ago
  2. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  3. bf360df Merge pull request #910 from dp-arm/dp/AArch32-juno-port by davidcunado-arm · 8 years ago
  4. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  5. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 8 years ago
  6. 8cbdab2 Merge pull request #870 from douglas-raillard-arm/dr/remove_asm_signed_test by davidcunado-arm · 8 years ago
  7. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 8 years ago
  8. 9d92e8c Replace ASM signed tests with unsigned by Douglas Raillard · 8 years ago
  9. c4364f6 Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat by davidcunado-arm · 8 years ago
  10. 3f13c35 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · 8 years ago
  11. 0a7e27c Merge pull request #853 from vwadekar/tegra-changes-from-downstream-v3 by davidcunado-arm · 8 years ago
  12. 8f87cc3 cpus: denver: remove barrier from denver_enable_dco() by Varun Wadekar · 9 years ago
  13. 1cc176b Merge pull request #848 from douglas-raillard-arm/dr/improve_errata_doc by danh-arm · 8 years ago
  14. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 9 years ago
  15. c847f66 Clarify errata ERRATA_A53_836870 documentation by Douglas Raillard · 8 years ago
  16. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · 9 years ago
  17. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  18. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  19. 1f5f812 Correct system include order by David Cunado · 8 years ago
  20. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  21. adb7027 AArch32: Fix the stack alignment issue by Soby Mathew · 8 years ago
  22. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  23. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  24. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 9 years ago
  25. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  26. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 9 years ago
  27. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 9 years ago
  28. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 9 years ago
  29. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 9 years ago
  30. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 9 years ago
  31. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 9 years ago
  32. afa8a78 Fix wording in cpu-ops.mk comments by Sandrine Bailleux · 9 years ago
  33. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
  34. f12a31d Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · 9 years ago
  35. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  36. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 9 years ago
  37. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · 9 years ago
  38. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · 9 years ago
  39. e364a8a Fix recursive crash prints on FVP AEM model by Soby Mathew · 10 years ago
  40. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  41. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · 10 years ago
  42. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 10 years ago
  43. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  44. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 10 years ago
  45. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  46. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  47. 937488b Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · 10 years ago
  48. 1604fa0 Optimize barrier usage during Cortex-A57 power down by Soby Mathew · 10 years ago
  49. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  50. 42aa5eb Add support for level specific cache maintenance operations by Soby Mathew · 10 years ago
  51. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  52. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  53. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  54. f1785fd Add platform API for reset handling by Soby Mathew · 10 years ago
  55. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago