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git01.mediatek.com / filogic / atf / 02016b2c0f450cfe59358ae9bfa73bc92b366fde / plat / nvidia / tegra / soc / t186 / plat_sip_calls.c
  1. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  2. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  3. 14f3957 Tegra186: Support AARCH32/64 encoding for MCE calls by Varun Wadekar · 7 years ago
  4. d64db96 Tegra186: read activity monitor's clock counter values by Varun Wadekar · 8 years ago
  5. b429d56 Tegra186: Add smc handler for coresight clock gating by Krishna Sitaraman · 8 years ago
  6. 4a3d057 Tegra186: delete 'Video Memory Carveout' handling by Varun Wadekar · 8 years ago
  7. 4ff3e8d Tegra186: mce: Uncore Perfmon ARI Programming by Varun Wadekar · 8 years ago
  8. ad2824f Tegra186: mce: enable LATIC for chip verification by Varun Wadekar · 8 years ago
  9. d66ee54 Tegra186: implement quasi power off (SC8) state by Varun Wadekar · 8 years ago
  10. cad7b08 Tegra186: register FIQ interrupt sources by Varun Wadekar · 9 years ago
  11. a7c1ea7 Tegra186: add Video memory carveout settings by Varun Wadekar · 8 years ago
  12. 59c3aa0 Tegra186: SiP calls to interact with the MCE driver by Varun Wadekar · 9 years ago
  13. 921b906 Tegra186: platform support for Tegra "T186" SoC by Varun Wadekar · 9 years ago