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git01.mediatek.com / filogic / atf / 01eac83b3fb7036ef64abdedb9201bd49d8dea31 / fdts / corstone700.dtsi
  1. 95294c9 corstone700: splitting the platform support into FVP and FPGA by Abdellatif El Khlifi · Mon Jul 06 16:15:23 2020 +0100[Renamed (88%) from fdts/corstone700.dts]
  2. ab8147c corstone700: updating the kernel arguments to support initramfs by Abdellatif El Khlifi · Tue Mar 24 11:04:17 2020 +0000
  3. 5125b41 corstone700: fdts: using DDR memory and XIP rootfs by Rui Silva · Wed Oct 09 12:54:30 2019 +0100
  4. 5be00c0 corstone700: set UART clocks to 32MHz by Vishnu Banavath · Wed Aug 07 10:49:05 2019 +0100
  5. 52990ae plat/arm: Introduce corstone700 platform. by Manish Pandey · Wed Nov 28 11:20:37 2018 +0000