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git01.mediatek.com / filogic / atf / 01eac83b3fb7036ef64abdedb9201bd49d8dea31 / drivers / st / clk / stm32mp_clkfunc.c
  1. 3c0fbfe feat(st): update the security based on new compatible by Lionel Debieve · Tue Dec 15 10:35:59 2020 +0100
  2. deef969 refactor(st-clock): update STGEN management by Lionel Debieve · Wed Dec 04 21:50:19 2019 +0100
  3. 5177ea2 refactor(st-clock): directly use oscillator name by Gabriel Fernandez · Fri May 15 08:00:03 2020 +0200
  4. 48519b3 feat(st-clock): manage disabled oscillator by Patrick Delaunay · Mon Jul 01 08:59:24 2019 +0200
  5. a205a5c feat(st): use newly introduced clock framework by Yann Gautier · Mon Aug 30 15:06:54 2021 +0200
  6. dc08ebe feat(drivers/st/uart): add uart driver for STM32MP1 by Nicolas Le Bayon · Wed Sep 11 11:46:40 2019 +0200
  7. eaab37d refactor(stm32mp_clk): keep RCC node offset by Yann Gautier · Thu Oct 22 15:37:22 2020 +0200
  8. 286d81e refactor(drivers/st/clk): change fdt_get_rcc_node as static by Patrick Delaunay · Tue Oct 06 14:32:26 2020 +0200
  9. a18f61b stm32mp1: get peripheral base address from a define by Yann Gautier · Tue May 05 17:58:40 2020 +0200
  10. 2d5690c plat/stm32: Implement fdt_read_uint32_default() as a wrapper by Andre Przywara · Thu Mar 26 11:50:33 2020 +0000
  11. cc99f3f plat/stm32: Use generic fdt_read_uint32_array() implementation by Andre Przywara · Thu Mar 26 12:51:21 2020 +0000
  12. 5f2e874 clk: stm32mp1: move oscillator functions to generic file by Yann Gautier · Fri May 17 15:57:56 2019 +0200
  13. 4d42947 stm32mp1: split clkfunc code by Yann Gautier · Thu Feb 14 11:15:20 2019 +0100