Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
00eefd9b1ad7845951b7341073e472d0e7a72262
/
plat
00eefd9
Add workaround for ARM Cortex-A53 erratum 855873
by Andre Przywara
· Thu Oct 06 16:54:53 2016 +0100
f270d6b
Merge pull request #861 from soby-mathew/sm/aarch32_fixes
by davidcunado-arm
· Sat Mar 18 12:16:27 2017 +0000
c4364f6
Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat
by davidcunado-arm
· Thu Mar 16 12:42:32 2017 +0000
719bf85
ARM platforms: Enable xlat tables lib v2
by Antonio Nino Diaz
· Thu Feb 23 17:22:58 2017 +0000
3f13c35
Apply workaround for errata 813419 of Cortex-A57
by Antonio Nino Diaz
· Fri Feb 24 11:39:22 2017 +0000
4ef91f1
Simplify translation tables headers dependencies
by Antonio Nino Diaz
· Mon Feb 20 14:22:22 2017 +0000
ed3c62b
Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs
by Varun Wadekar
· Mon Mar 06 09:15:15 2017 -0800
18e5bc4
Merge pull request #863 from vwadekar/tegra-changes-from-downstream-v4
by davidcunado-arm
· Sat Mar 04 00:56:46 2017 +0000
87f0fa8
Merge pull request #854 from rockchip-linux/pm_plat
by davidcunado-arm
· Fri Mar 03 23:29:01 2017 +0000
3fb854f
Tegra: enable SEPARATE_CODE_AND_RODATA build flag
by Varun Wadekar
· Tue Feb 28 08:23:59 2017 -0800
3ecb021
rockchip: Change the callback implement of power domain for rk3368
by tony.xie
· Fri Mar 03 16:22:12 2017 +0800
20e9fef
Tegra210: assert if afflvl0/1 have incorrect state-ids
by Harvey Hsieh
· Wed Dec 28 21:53:18 2016 +0800
e0f3dfd
Tegra: SiP: 64-bit address for Video Memory base
by Harvey Hsieh
· Tue Oct 11 18:59:52 2016 +0800
2c60b0a
Tegra: increase ADDR_SPACE_SIZE to 35 bits
by Steven Kao
· Thu Nov 24 19:24:37 2016 +0800
777baa5
Tegra: init the console only if the platform supports it
by Damon Duan
· Mon Nov 07 19:37:50 2016 +0800
1edb882
Tegra210: new TZDRAM base address
by Varun Wadekar
· Thu Sep 01 14:59:32 2016 -0700
dba8007
Tegra210: set core power state during cluster power down
by Varun Wadekar
· Thu Sep 01 14:56:17 2016 -0700
14eaede
Tegra: calculate proper power state for affinity levels
by Varun Wadekar
· Thu Sep 01 14:51:59 2016 -0700
bfc6605
Tegra: fix logic to calculate GICD_ISPENDR register address
by Varun Wadekar
· Tue Aug 23 14:01:19 2016 -0700
a2c6be6
Tegra: uninit and re-init console across System Suspend
by Varun Wadekar
· Mon Aug 01 22:16:21 2016 -0700
28dcc21
Tegra: support for silicon/simulation platforms
by Varun Wadekar
· Wed Jul 20 10:28:51 2016 -0700
50d768d
AArch32: Enable override of plat_set_my_stack/plat_get_my_stack
by Soby Mathew
· Tue Feb 14 10:21:55 2017 +0000
422d51c
rockchip: plat_pm.c: Change callbacks implement for our SOCs.
by tony.xie
· Wed Mar 01 11:05:17 2017 +0800
f2aa1be
Tegra: per-soc `get_target_pwr_state` handler
by Varun Wadekar
· Tue Jun 07 12:00:06 2016 -0700
b41a414
Tegra: relocate BL32 image to TZDRAM memory
by Varun Wadekar
· Mon May 23 15:56:14 2016 -0700
d22d4ad
Tegra: get BL31 arguments from previous bootloader
by Varun Wadekar
· Mon May 23 11:41:07 2016 -0700
197a75f
Tegra: return BL32 entry point info if it is valid
by Varun Wadekar
· Mon Jun 06 10:46:28 2016 -0700
5118b53
Tegra: configure TZDRAM fence during early setup
by Varun Wadekar
· Sat Jun 04 22:08:50 2016 -0700
d5f578a
Tegra: restore TZRAM settings on "System Resume"
by Varun Wadekar
· Wed Jun 01 19:34:37 2016 -0700
69ce101
Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
by Varun Wadekar
· Thu May 12 13:43:33 2016 -0700
c6c386d
Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1
by Varun Wadekar
· Fri May 20 16:21:22 2016 -0700
dc79930
Tegra: implement FIQ interrupt handler
by Varun Wadekar
· Mon Dec 28 16:36:42 2015 -0800
b7b4575
Tegra: GIC: enable FIQ interrupt handling
by Varun Wadekar
· Mon Dec 28 14:55:41 2015 -0800
2497539
Tegra: implement common handler `plat_get_target_pwr_state()`
by Varun Wadekar
· Thu May 05 14:13:30 2016 -0700
25e658e
Tegra: include platform_def.h to access UART macros
by Varun Wadekar
· Tue Apr 26 11:38:38 2016 -0700
2330edd
Tegra: allow SiP smc calls from Secure World
by Wayne Lin
· Thu Mar 31 13:49:09 2016 -0700
3f0a8ad
Tegra: handler for per-soc early setup
by Varun Wadekar
· Mon Mar 28 15:56:47 2016 -0700
1ec441e
Tegra: relocate code to BL31_BASE during cold boot
by Varun Wadekar
· Thu Mar 24 15:34:24 2016 -0700
79fa1a4
Tegra: Disable A57/A53 cache non-temporal hints
by Varun Wadekar
· Mon Mar 21 11:18:40 2016 -0700
e8f7e1d
Merge pull request #835 from rockchip-linux/rk3399-atf-cleanup-20170210
by davidcunado-arm
· Mon Feb 27 15:25:45 2017 +0000
d81abf1
rockchip: rk3399: enable secure accessing for SRAM
by Xing Zheng
· Tue Feb 14 18:03:20 2017 +0800
be2a895
rockchip: rk3399: Use tFC value instead of tRFC value
by Derek Basehore
· Thu Feb 09 22:08:48 2017 -0800
b07dfeb
rockchip: rk3399: Fix CAS latency setting
by Derek Basehore
· Thu Feb 09 22:02:42 2017 -0800
035d6d6
rockchip: rk3399: disable training modules after DDR DFS
by Xing Zheng
· Thu Feb 09 14:51:38 2017 +0800
397046c
rockchip: rk3399: Move DQS drive strength setting to M0
by Derek Basehore
· Wed Feb 01 18:09:13 2017 -0800
b734ba5
rockchip: rk3399: Remove dram dfs optimization
by Derek Basehore
· Tue Jan 31 16:37:01 2017 -0800
04c74b9
rockchip: rk3399: Save and restore RX_CAL_DQS values
by Derek Basehore
· Tue Jan 31 00:20:19 2017 -0800
84afaaf
rockchip: Add MIN() and MAX() macros back to M0 code
by Julius Werner
· Mon Jan 30 18:26:07 2017 -0800
f585246
rockchip: Clean up M0 Makefile, clarify float-abi
by Julius Werner
· Mon Jan 30 16:13:21 2017 -0800
22a9871
rockchip: rk3399: Clean up and seprate secure parts from SoC codes
by Xing Zheng
· Fri Feb 24 14:56:41 2017 +0800
c39aacd
rockchip: rk3399: sperate the BL31 parameters for sharing
by Xing Zheng
· Thu Dec 22 18:34:14 2016 +0800
5e1e48f
rockchip: rk3399: configure the DDR secure region for BL31 image
by Xing Zheng
· Fri Feb 24 14:47:51 2017 +0800
b4bcc1d
rockchip: Clean up header and referenced files
by Xing Zheng
· Fri Feb 24 16:26:11 2017 +0800
fc0552d
rockchip: rk3399: Don't wait for vblank in M0 for ddrfreq
by Derek Basehore
· Mon Jan 09 15:38:57 2017 -0800
2510366
rockchip: rk3399: restore PMU_CRU_GATEDIS_CON0 value after ddr dvfs
by Lin Huang
· Fri Dec 30 11:50:01 2016 +0800
8140b7d
rockchip: rk3399: fix PMU_CRU_GATEDIS_CON0 setting error
by Lin Huang
· Fri Dec 30 13:53:25 2016 +0800
61230b0
FIXUP: rockchip: rk3399: fix the incorrect bit during m0_init
by Xing Zheng
· Tue Dec 20 20:44:41 2016 +0800
b4a7676
rockchip: rk3399: improve the m0 enable flow
by Lin Huang
· Mon Dec 12 15:18:08 2016 +0800
3b0eb7e
rockchip: rk3399: check vop status when we wait dma finish flag
by Lin Huang
· Thu Dec 01 16:55:05 2016 +0800
e7c2422
rockchip: rk3399: add stopwatch functions to m0
by Lin Huang
· Wed Nov 30 16:57:08 2016 +0800
52512c2
rockchip: rk3399: dram: set all ddr frequency pll_postdiv values to 0
by Lin Huang
· Thu Dec 15 15:08:47 2016 +0800
dc8e82e
rockchip: rk3399: enable CA training when do ddr dfs
by Lin Huang
· Fri Dec 16 13:59:07 2016 +0800
c8e5c78
rockchip: rk3399: fix hang in ddr set rate
by Derek Basehore
· Fri Feb 24 14:33:03 2017 +0800
0e8909d
rockchip: rk3399: Enable per CS training at 666MHz
by Derek Basehore
· Wed Nov 09 18:28:19 2016 -0800
e13bc54
rockchip: rk3399: add support for ddrfreq suspend/resume
by Derek Basehore
· Fri Feb 24 14:31:36 2017 +0800
93280b7
rk3399: dram: use PMU M0 to do ddr frequency scaling
by Xing Zheng
· Wed Oct 26 21:25:26 2016 +0800
b9be54b
rockchip/rk3399: Cleanup platform.mk file
by Derek Basehore
· Thu Oct 20 16:19:22 2016 -0700
aae6be4
rockchip: update the raw read/write APIs for M0
by Xing Zheng
· Mon Oct 24 21:06:25 2016 +0800
b106512
rk3399: dram: making phy into dll bypass mode at low frequency
by Derek Basehore
· Thu Oct 20 22:09:22 2016 -0700
ff461d0
rockchip: rk3399: dram: remove dram_init and dts_timing_receive function
by Derek Basehore
· Thu Oct 20 20:46:43 2016 -0700
d22429d
Tegra: implement pwr_domain_pwr_down_wfi() handler
by Varun Wadekar
· Fri Mar 18 14:35:28 2016 -0700
d151363
Tegra: memmap BL31's TZDRAM carveout
by Varun Wadekar
· Fri Mar 18 13:01:12 2016 -0700
e032363
Tegra: increase BL31 image size to 256KB
by Varun Wadekar
· Thu Mar 03 18:27:28 2016 -0800
6eec6d6
Tegra: allow individual SoCs to restore their settings
by Varun Wadekar
· Thu Mar 03 13:28:10 2016 -0800
d43583c
cpus: denver: disable DCO operations from platform code
by Varun Wadekar
· Mon Feb 22 11:09:41 2016 -0800
6077dce
Tegra: enable PSCI extended state ID processing
by Varun Wadekar
· Wed Jan 27 11:31:06 2016 -0800
3ce5499
Tegra: define platform power states
by Varun Wadekar
· Tue Jan 19 13:55:19 2016 -0800
0dc9181
Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM
by Varun Wadekar
· Wed Dec 30 15:06:41 2015 -0800
1dcffa9
Tegra: enable runtime console
by Varun Wadekar
· Fri Jan 08 17:48:42 2016 -0800
e5caeed
Tegra: PM: soc-specific system off handler
by Varun Wadekar
· Thu Jan 07 14:04:21 2016 -0800
923d04a
Tegra: handlers for common and SoC-specific SiP calls
by Varun Wadekar
· Wed Dec 09 18:18:53 2015 -0800
d2014c6
Tegra: init normal/crash console for platforms
by Varun Wadekar
· Thu Oct 29 10:37:28 2015 +0530
6bb6246
Tegra: add tzdram_base to plat_params_from_bl2 struct
by Varun Wadekar
· Tue Oct 06 12:49:31 2015 +0530
7a9a285
Tegra: Memory Controller Driver (v1)
by Varun Wadekar
· Fri Sep 18 11:21:22 2015 +0530
baf903e
Tegra: sanity check members of the "from_bl2" struct
by Varun Wadekar
· Tue Sep 22 15:00:06 2015 +0530
39f87d1
Tegra: use ClusterId for calculating core position
by Varun Wadekar
· Tue Sep 22 13:45:07 2015 +0530
b24dea9
Tegra: enable processor retention and L2/CPUECTLR access
by Varun Wadekar
· Tue Sep 22 13:33:56 2015 +0530
97f2490
Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform
by Varun Wadekar
· Wed Sep 09 11:29:24 2015 +0530
cbdace1
Tegra: SoC specific SiP handlers
by Varun Wadekar
· Thu Sep 03 14:32:44 2015 +0530
a1176ba
Tegra: include flowctlr driver from SoC specific makefiles
by Varun Wadekar
· Tue Aug 25 17:01:06 2015 +0530
88de358
Merge pull request #841 from dp-arm/dp/debug-regs
by danh-arm
· Mon Feb 20 13:58:48 2017 +0000
0470202
Merge pull request #834 from douglas-raillard-arm/dr/use_dc_zva_zeroing
by davidcunado-arm
· Thu Feb 16 14:49:37 2017 +0000
b71946b
Juno: Disable SPIDEN in release builds
by dp-arm
· Wed Feb 08 12:16:42 2017 +0000
66abfbe
PSCI: Decouple PSCI stat residency calculation from PMF
by dp-arm
· Tue Jan 31 13:01:04 2017 +0000
a8954fc
Replace some memset call by zeromem
by Douglas Raillard
· Thu Jan 26 15:54:44 2017 +0000
21362a9
Introduce unified API to zero memory
by Douglas Raillard
· Fri Dec 02 13:51:54 2016 +0000
da7ffae
Merge pull request #825 from dp-arm/dp/simplify-cond
by danh-arm
· Tue Jan 31 15:38:19 2017 +0000
32b3a43
Merge pull request #819 from davidcunado-arm/dc/build_with_gcc6.2
by danh-arm
· Tue Jan 31 11:09:27 2017 +0000
3d1b8a6
tbbr: Simplify conditional
by dp-arm
· Tue Jan 31 10:54:39 2017 +0000
2e36de8
Resolve build errors flagged by GCC 6.2
by David Cunado
· Thu Jan 19 10:26:16 2017 +0000
Next »